Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents
49
T48C862-R8
4590B–4BMCU–02/03
Timer 2 Output Mode 4 Biphase Modulator: Timer 2 Modulates the SSI Internal Data Output (SO) to Biphase
Code.
Figure 45. Biphase Modulation
Timer 2 Output Mode 5 Manchester Modulator: Timer 2 Modulates the SSI internal data output (SO) to
Manchester code
Figure 46. Manchester Modulation
Timer 2 Output Mode 7 In this mode the timer overflow defines the period and the compare register defines the
duty cycle. During one period only the first compare match occurrence is used to toggle
the timer output flip-flop, until the overflow all further compare match are ignored. This
avoids the situation that changing the compare register causes the occurrence of sev-
eral compare match during one period. The resolution at the pulse-width modulation
Timer 2 mode 1 is 12-bit and all other Timer 2 modes are 8-bit.
TOG2
SC
SO
T2O
0000
00110101
11 1 1
8-bit SR-Data
Bit 7 Bit 0
Data: 00110101
TOG2
SC
SO
T2O
000
00110101
11 1 1
8-bit SR-Data
Bit 7 Bit 0
0
Bit 7 Bit 0
Data: 00110101