Owner manual
Table Of Contents
- Features
- Description
- Pin Configuration
- Pin Description: RF Part
- Pin Description: Microcontroller Part
- UHF ASK/FSK Transmitter Block
- Features
- Description
- General Description
- Functional Description
- Absolute Maximum Ratings
- Thermal Resistance
- Electrical Characteristics
- Microcontroller Block
- Features
- Description
- Introduction
- Microcontroller Architecture General Description
- Components of Microcontroller Core
- Master Reset
- Voltage Monitor
- Clock Generation
- Power-down Modes
- Peripheral Modules
- Bi-directional Ports
- Timer 3
- Features
- Timer/Counter Modes
- Timer 3 – Mode 1: Timer/Counter
- Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 – Mode 3: Timer/Counter, Internal Trigger Restart and Internal Capture (with TOG2)
- Timer 3 – Mode 4: Timer/Counter
- Timer 3 – Mode 5: Timer/Counter, External Trigger Restart and External Capture (with T3I Input)
- Timer 3 Modulator/Demodulator Modes
- Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle FlipFlo...
- Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)
- Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)
- Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register
- Timer 3 – Mode 10: Manchester Demodulation/Pulse-width Demodulation
- Timer 3 – Mode 11: Biphase Demodulation
- Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)
- Timer 3 Modulator for Carrier Frequency Burst Modulation
- Timer 3 Demodulator for Biphase, Manchester and Pulse-width-modulated Signals
- Timer 3 Registers
- Timer 3 Mode Register (T3M)
- Timer 3 Control Register 1 (T3C) Write
- Timer 3 Status Register 1 (T3ST) Read
- Timer 3 Clock Select Register (T3CS)
- Timer 3 Compare- and Compare-mode Register
- Timer 3 Compare-Mode Register 1 (T3CM1)
- Timer 3 Compare Mode Register 2 (T3CM2)
- Timer 3 COmpare Register 1 (T3CO1) Byte Write
- Timer 3 COmpare Register 2 (T3CO2) Byte Write
- Timer 3 Capture Register
- Synchronous Serial Interface (SSI)
- Serial Interface Registers
- Combination Modes
- Absolute Maximum Ratings
- Thermal Resistance
- DC Operating Characteristics
- AC Characteristics
- Crystal Characteristics
- Ordering Information
- Package Information
- Table of Contents

35
T48C862-R8
4590B–4BMCU–02/03
Port 2 Data Register (P2DAT) Primary register address: "2"hex
* Bit 3 -> MSB, Bit 0 -> LSB
Port 2 Control Register (P2CR) Auxiliary register address: "2"hex
Value: 1111b means all pins in input mode
Bi-directional Port 5 As all other bi-directional ports, this port includes a bitwise programmable Control Reg-
ister (P5CR), which allows the individual programming of each port bit as input or
output. It also opens up the possibility of reading the pin condition when in output mode.
This is a useful feature for self testing and for serial bus applications.
The port pins can also be used as external interrupt inputs (see Figure 29 and Figure
30). The interrupts (INT1 and INT6) can be masked or independently configured to trig-
ger on either edge. The interrupt configuration and port direction is controlled by the Port
5 Control Register (P5CR). An additional low resistance pull-up/pull-down transistor
mask option provides an internal bus pull-up for serial bus applications.
The Port 5 Data Register (P5DAT) is I/O mapped to the primary address register of
address "5"h and the Port 5 Control Register (P5CR) to the corresponding auxiliary
register. The P5CR is a byte-wide register and is configured by writing first the low
nibble and then the high nibble (see section "Addressing Peripherals").
Bit 3 * Bit 2 Bit 1 Bit 0
P2DAT3 P2DAT2 P2DAT1 P2DAT0 Reset value: 1111b
Bit 3Bit 2Bit 1Bit 0
P2CR3 P2CR2 P2CR1 P2CR0 Reset value: 1111b
Code
3 2 1 0 Function
x x x 1 BP20 in input mode
x x x 0 BP20 in output mode
x x 1 x BP21 in input mode
x x 0 x BP21 in output mode
x 1 x x BP22 in input mode
x 0 x x BP22 in output mode
1 x x x BP23 in input mode
0 x x x BP23 in output mode










