Owner manual

25
T48C862-R8
4590B–4BMCU–02/03
Figure 20. Clock Module
Table 3. Clock Modes
The clock module generates two output clocks. One is the system clock (SYSCL) and
the other the periphery (SUBCL). The SYSCL can supply the core and the peripherals
and the SUBCL can supply only the peripherals with clocks. The modes for clock
sources are programmable with the OS1-bit and OS0-bit in the SC-register and the
CCS-bit in the CM-register.
Oscillator Circuits and
External Clock Input
Stage
The microcontroller block series consists of four different internal oscillators: two RC-
oscillators, one 4-MHz crystal oscillator, one 32-kHz crystal oscillator and one external
clock input stage.
RC-oscillator 1
Fully Integrated
For timing insensitive applications, it is possible to use the fully integrated RC
oscillator 1. It operates without any external components and saves additional costs.
The RC-oscillator 1 center frequency tolerance is better than ±50% over the full temper-
ature and voltage range. The basic center frequency of the RC-oscillator 1 is
f
O
» 3.8 MHz. The RC oscillator 1 is selected by default after power-on reset.
Mode OS1 OS0
Clock Source for SYSCL
Clock Source
for SUBCLCCS = 1 CCS = 0
1 1 1 RC-oscillator 1 (internal) External input clock C
in
/16
2 0 1 RC-oscillator 1 (internal)
RC-oscillator 2 with
external trimming
resistor
C
in
/16
3 1 0 RC-oscillator 1 (internal) 4-MHz oscillator C
in
/16
4 0 0 RC-oscillator 1 (internal) 32-kHz oscillator 32 kHz
Ext. clock
ExI
n
ExOu
t
Stop
RC oscillator2
RCOut2
Stop
R
Trim
4-MHz oscillator
4Out
Stop
Osci
n
Oscou
t
Osci
n
Oscou
t
32-kHz oscillator
32Out
Osci
n
Oscou
t
RC
oscillator 1
RCOut1
ControlStop
IN1
IN2
Cin
/2 /2 /2 /2
Divide
r
Sleep
WDL
Osc-
Stop
NSTOP CCS CSS1 CSS0CM:
BOT - - - OS1 OS0
SUBCL
SYSCL
SC:
*
OSC1
*
OSC2
*
Configurable
Cin/16
32
kHz