Manual
RF22
Version: 0.1 Date: 12/23/2008
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3 enpactx Enable Packet TX Handling.
If FIFO Mode (dtmod=10) is being used automatic packet handling may be enabled. Setting
enpactx=1 will enable automatic packet handling in the TX path. Register 30-4D allow for various
configurations of the packet structure. Setting enpactx=0 will not do any packet handling in the TX
path. It will only transmit what is loaded to the FIFO.
2 encrc CRC Enable.
Cyclic Redundancy Check generation is enabled if this bit is set.
1:0 crc[1:0] CRC Polynomial Selection.
00: CCITT
01: CRC-16 (IBM)
10: IEC-16
11: Biacheva
Register 31h. EzMAC Status
Bit D7 D6 D5 D4 D3 D2 D1 D0
Name Reserved rxcrc1 pksrch pkrx pkvalid crcerror pktx pksent
Type R R R R R R R R
Reset value = 00000000
Bit Name Function
7 Reserved Reserved.
6 rxcrc1 If high, it indicates the last CRC received is all one’s.
May indicate Transmitter underflow in case of CRC error.
5 pksrch Packet Searching.
When pksrch = 1 the radio is searching for a valid packet.
4 pkrx Packet Receiving.
When pkrx = 1 the radio is currently receiving a valid packet.
3 pkvalid Valid Packet Received.
When a pkvalid = 1 a valid packet has been received by the receiver. (Same bit as in register 03,
but reading it does not reset the IRQ)
2 crcerror CRC Error.
When crcerror = 1 a Cyclic Redundancy Check error has been detected. (Same bit as in register
03, but reading it does not reset the IRQ)
1 pktx Packet Transmitting.
When pktx = 1 the radio is currently transmitting a packet.
0 pksent Packet Sent.
A pksent = 1 a packet has been sent by the radio. (Same bit as in register 03, but reading it does
not reset the IRQ)
Register 32h. Header Control 1
Bit D7 D6 D5 D4 D3 D2 D1 D0
Name
bcen[3:0]
hdcd[3:0]
Type R/W R/W
Reset value = 00001100
Bit Name Function
7:4 bcen[3:0] Broadcast Address (FFh) Check Enable.
If it is enabled together with Header Byte Check then the header check is OK if the incoming
header byte equals with the appropriate check byte or FFh. One hot encoding.
0000: No broadcast address enabled.
0001: Broadcast address enable for header byte 0.
0010: Broadcast address enable for header byte 1.
0011: Broadcast address enable for header bytes 0 & 1.
0100: …
3:0 hdch[3:0] Received Header Bytes to be Checked Against the Check Header Bytes.
One hot encoding. The receiver will use hdch[2:0] to know the position of the Header Bytes.
0000: No Received Header check
0001: Received Header check for byte 0.
0010: Received Header check for bytes 1.
0011: Received header check for bytes 0 & 1.
0100: …










