Manual
Table Of Contents
- 1 GENERAL DESCRIPTION
- 2 FEATURES
- 3 PARTS INFORMATION LIST AND PIN CONFIGURATION
- 4 BLOCK DIAGRAM
- 5 FUNCTIONAL DESCRIPTION
- 5.1 ARM® Cortex™-M0 core
- 5.2 System Manager
- 5.3 Clock Controller
- 5.4 USB Device Controller
- 5.5 General Purpose I/O
- 5.6 I2C Serial Interface Controller (Master/Slave)
- 5.7 PWM Generator and Capture Timer
- 5.8 Real Time Clock (RTC)
- 5.9 Serial Peripheral Interface (SPI) Controller
- 5.10 Timer Controller
- 5.11 Watchdog Timer
- 5.12 UART Interface Controller
- 5.13 Controller Area Network (CAN Bus)
- 5.14 PS2 Device Controller (PS2D)
- 5.15 I2S Controller
- 5.16 Analog-to-Digital Converter (ADC)
- 5.17 Analog Comparator
- 5.18 PDMA Controller
- 6 FLASH MEMORY CONTROLLER (FMC)
- 7 ELECTRICAL CHARACTERISTICS
- 7.1 Absolute Maximum Ratings
- 7.2 DC Electrical Characteristics
- 7.3 AC Electrical Characteristics
- 7.4 Analog Characteristics
- 7.4.1 Specification of 12-bit SARADC
- 7.4.2 Specification of LDO & Power management
- 7.4.3 Specification of Low Voltage Reset
- 7.4.4 Specification of Brownout Detector
- 7.4.5 Specification of Power-On Reset (5V)
- 7.4.6 Specification of Temperature Sensor
- 7.4.7 Specification of Comparator
- 7.4.8 Specification of USB PHY
- 8 PACKAGE DIMENSIONS
- 9 REVISION HISTORY
NUC140 Series DATA SHEET
4 BLOCK DIAGRAM
4.1 NUC140 Block Diagram
FLASH
128KB
Cortex-M0
50MHz
CLK_CTL
PDMA
ISP 4KB
SRAM
16KB
GPIO
A,B,C,D,E
PS2
SPI 2/3
UART 1 -115K CAN 0
I2C 1 -1M
Timer 2/3
RTC
WDG
I2C 0 -1M
USB-FS
512BRAM
SPI 0/1
UART 0 -3M
PWM 0~3
Timer 0/1/
12-bit ADC
Analog
Comparator
POR
Brown-out
LVR
USBPHY
Peripherals with PDMA
UART 2 -115K
I2S
PWM 4~7
10 kHz
32 KHz
P
L
L
22 MHz
12 MHz
LDO
2.5V~
5.5V
Figure 4-1 NUC140 Block Diagram
Publication Release Date: May 31, 2010
- 21 - Revision V1.02