Manual

Stereo Audio Codec
with FLEXSOUND Technology
MAX98088
64
Table 2. Power Management Registers (continued)
REGISTER BIT NAME DESCRIPTION
0x4D
7 HPLEN
Left Headphone Enable
0 = Disabled
1 = Enabled
6 HPREN
Right Headphone Enable
0 = Disabled
1 = Enabled
5 SPLEN
Left Speaker Enable
0 = Disabled
1 = Enabled
4 SPREN
Right Speaker Enable
0 = Disabled
1 = Enabled
3 RECLEN
Receiver/Left Line Output Enable. Use this bit to enable the differential receiver output
or left line output.
0 = Disabled
1 = Enabled
2 RECREN
Right Line Output Enable. Use this bit to enable the right line output.
0 = Disabled
1 = Enabled
1 DALEN
Left DAC Enable
0 = Disabled
1 = Enabled
0 DAREN
Right DAC Enable
0 = Disabled
1 = Enabled
0x4E
7 BGEN
Bandgap Enable
0 = Disabled
1 = Enabled
6 SPREGEN
2.5V Regulator Enable. SPREGEN enables a 2.5V internal regulator required for the
ADC, speaker and receiver amplifier. The 2.5V regulator is powered by SPKLVDD.
0 = Disabled
1 = Enabled
5 VCMEN
Common-Mode Voltage Resistor String Enable. VCMEN enables the common mode
voltages for the amplifiers in the CODEC.
0 = Disabled
1 = Enabled
4 BIASEN
Chip Bias Enable. BIASEN needs to be set for the CODEC amplifiers to be enabled.
0 = Disabled
1 = Enabled