Manual

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MAX5971B
Single-Port, 40W, IEEE 802.3af/at,
PSE Controller with I
2
C
Backoff Enable Register (R15h)
The backoff enable register (R15h, Table 22) is used
to control cadence timing (midspan) for the port. On a
power-up or after a reset condition, this register is set to
a default value of 0000 to 000x where x is the latched in
value of the MIDSPAN input. Setting BCKOFF (R15h[0])
to 1 enables cadence timing where the port backs off and
waits 2.2s (typ) after each failed load detection. The IEEE
802.3af/at standard requires a PSE that delivers power
through the spare pairs (midspan) to have cadence tim-
ing (see the Midspan Mode section for details).
Timing Register (R16h)
The timing register (R16h, Table 23) is used to program
the restart, startup, overcurrent, and load-disconnect
timers for the port. On a power-up or after a reset con-
dition, the timing register is set to a default value of
00h. To program the timer values, set the bits in R16h
to scale the t
DISC
, t
FAULT
, t
START
, and t
RESTART
to a
multiple of their nominal value specified in the Electrical
Characteristics table.
TDISC[1:0] (R16h[1:0]) is used to program the load-
disconnect detection time (t
DISC
). The device turns off
power to the port if it fails to provide a minimum power
maintenance signal for longer than the programmed
load-disconnect detection time. TFAULT[1:0] (R16h[3:2])
programs the overcurrent fault time (t
FAULT
). Fault time
is the time allowed for the port to remain in an overcur-
rent state both during startup and normal operation
(see the Overcurrent Protection section). TSTART[1:0]
(R16h[5:4]) programs the startup timer (t
START
). Startup
time is the time the port is allowed to be in current limit
during startup. RSTR[1:0] programs the discharge rate
of the TFAULT counter (t
RESTART
) and effectively sets
the time the port remains off after an overcurrent fault.
When the MAX5971B shuts down a port due to an
extended overcurrent condition (either during startup or
normal operation), if RSTR_EN (R17h[6]) is set high, the
part does not allow the port to power back on before the
restart timer (t
RESTART
) returns to zero. This effectively
sets a minimum duty cycle that protects the external
MOSFET from overheating during a prolonged output
overcurrent condition.
Table 22. Backoff Enable Register
Table 23. Timing Register
ADDRESS = 16h
DESCRIPTION
SYMBOL BIT NO. TYPE
RSTR[1] 7 R/W Restart timer programming bit 1
RSTR[0] 6 R/W Restart timer programming bit 0
TSTART[1] 5 R/W Startup timer programming bit 1
TSTART[0] 4 R/W Startup timer programming bit 0
TFAULT[1] 3 R/W Overcurrent timer programming bit 1
TFAULT[0] 2 R/W Overcurrent timer programming bit 0
TDISC[1] 1 R/W Load-disconnect timer programming bit 1
TDISC[0] 0 R/W Load-disconnect timer programming bit 0
ADDRESS = 15h
DESCRIPTION
SYMBOL BIT NO. TYPE
Reserved 7 — Reserved
Reserved 6 — Reserved
Reserved 5 — Reserved
Reserved 4 — Reserved
Reserved 3 — Reserved
Reserved 2 — Reserved
Reserved 1 — Reserved
BCKOFF 0 R/W Enable cadence timing on the port