Manual

30 _____________________________________________________________________________________
MAX5971B
Single-Port, 40W, IEEE 802.3af/at,
PSE Controller with I
2
C
Reserved Registers (R0Dh to R0Fh)
Registers R0Dh to R0Fh are unconnected; writing to
them has no effect (address autoincrement still func-
tions) and a read always returns logical zeros.
Power Status Register (R10h)
The power status register (R10h, Table 16) records the
current status of port power. On power-up or after a reset
condition, the port is initially unpowered and the power
status register is set to its default value of 00h. PGOOD
(R10h[4]) is set to 1 at the end of the power-up startup
period. PGOOD is reset to 0 whenever a fault condition
occurs. PWR_EN (R10h[0]) is set to 1 when the port
power is turned on. PWR_EN resets to 0 as soon as the
port turns off. Any transition of PGOOD and PWR_EN
bits set the corresponding bit in the power event register
(R02h/R03h, Table 9).
Table 14. Detection Result Decoding Chart
Table 15. Classification Result Decoding Chart
Table 16. Power Status Register
CLASS[2:0]
(ADDRESS = 0Ch)
CLASS RESULT
000 Unknown
001 1
010 2
011 3
100 4
101 5
110 0
111 Class FAIL
DET_ST[2:0]
(ADDRESS = 0Ch)
DETECTED DESCRIPTION
000 None Detection status unknown (default)
001 DCP Positive DC supply connected at the port (V
AGND
- V
OUT_
< 1V)
010 HIGH CAP
High capacitance at the port (> 8.5FF, typ)
011 RLOW
Low resistance at the port (R
DET
< 15kI)
100 DET_OK
Detection pass (15kI > R
DET
> 33kI)
101 RHIGH
High resistance at the port (R
DET
> 33kI)
110 OPEN
Open port (I
DET
< 20FA)
111 DCN Negative DC bias on the port (V
OUT
- V
EE
< 2V)
ADDRESS = 10h
DESCRIPTION
SYMBOL BIT NO. TYPE
Reserved 7 — Reserved
Reserved 6 — Reserved
Reserved 5 — Reserved
PGOOD 4 R Power-good condition on the port
Reserved 3 — Reserved
Reserved 2 — Reserved
Reserved 1 — Reserved
PWR_EN 0 R Power is enabled on the port