9-4593; Rev 0; 7/09 High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The MAX5965A/MAX5965B are quad, monolithic, -48V power controllers designed for use in IEEE® 802.3af-compliant/pre-IEEE 802.3at-compatible power-sourcing equipment (PSE). These devices provide powered device (PD) discovery, classification, current limit, DC and AC load disconnect detections in compliance with the IEEE 802.3af standard.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ABSOLUTE MAXIMUM RATINGS (Voltages referenced to VEE, unless otherwise noted.) AGND, DGND, DET_, VDD, RESET, A3–A0, SHD_, OSC, SCL, SDAIN, AUTO .............................................-0.3V to +80V OUT_........................................................-12V to (AGND + 0.3V) GATE_ (internally clamped) (Note 1) ..................-0.3V to +11.4V SENSE_ .............................................................
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (VAGND = 32V to 60V, VEE = 0V, VDD to VDGND = +3.3V, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND = +48V, VDGND = +48V, VDD = (VDGND + 3.3V), TA = +25°C. Currents are positive when entering the pin and negative otherwise.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ELECTRICAL CHARACTERISTICS (continued) (VAGND = 32V to 60V, VEE = 0V, VDD to VDGND = +3.3V, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND = +48V, VDGND = +48V, VDD = (VDGND + 3.3V), TA = +25°C. Currents are positive when entering the pin and negative otherwise.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (VAGND = 32V to 60V, VEE = 0V, VDD to VDGND = +3.3V, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND = +48V, VDGND = +48V, VDD = (VDGND + 3.3V), TA = +25°C. Currents are positive when entering the pin and negative otherwise.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ELECTRICAL CHARACTERISTICS (continued) (VAGND = 32V to 60V, VEE = 0V, VDD to VDGND = +3.3V, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND = +48V, VDGND = +48V, VDD = (VDGND + 3.3V), TA = +25°C. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (VAGND = 32V to 60V, VEE = 0V, VDD to VDGND = +3.3V, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND = +48V, VDGND = +48V, VDD = (VDGND + 3.3V), TA = +25°C. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER Differential Nonlinearity SYMBOL CONDITIONS MIN DNL TYP MAX UNITS 0.2 1.
Typical Operating Characteristics (VEE = -48V, VDD = +3.3V, VAUTO = VAGND = VDGND = 0V, RESET = SHD_ = unconnected, RSENSE = 0.5Ω, IVEE = 00, ICUT = 000, TA = +25°C, all registers = default setting, unless otherwise noted.) 5.1 5.0 4.9 4.8 5.2 5.1 4.8 4.6 4.5 4.5 36 40 44 48 52 56 60 VEE = -48V 4.9 4.7 MEASURED AT VDD 125 VDD = 3.6V 120 115 VDD = 3.3V 110 105 VDD = 2.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet 150 100 350 300 250 200 ICUT = 001 150 100 50 50 0 0 10 20 30 40 0 50 5 4 3 2 0 10 VOUT - VEE (V) 20 30 40 50 MAX5965A toc11 ICUT = 001 400 6 DC LOAD DISCONNECT THRESHOLD (mV) 200 MAX5965A toc10A 450 VSENSE - VEE (mV) 250 VSENSE - VEE (mV) 500 MAX5965A toc10 300 DC LOAD DISCONNECT THRESHOLD vs. TEMPERATURE FOLDBACK CURRENT-LIMIT THRESHOLD vs. OUTPUT VOLTAGE FOLDBACK CURRENT-LIMIT THRESHOLD vs.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Typical Operating Characteristics (continued) (VEE = -48V, VDD = +3.3V, VAUTO = VAGND = VDGND = 0V, RESET = SHD_ = unconnected, RSENSE = 0.5Ω, IVEE = 00, ICUT = 000, TA = +25°C, all registers = default setting, unless otherwise noted.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet STARTUP IN MIDSPAN MODE WITH VALID PD (25kI AND 0.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Typical Operating Characteristics (continued) (VEE = -48V, VDD = +3.3V, VAUTO = VAGND = VDGND = 0V, RESET = SHD_ = unconnected, RSENSE = 0.5Ω, IVEE = 00, ICUT = 000, TA = +25°C, all registers = default setting, unless otherwise noted.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet PIN NAME FUNCTION 6 SDAIN Serial Interface Input Data Line. Connect the data line optocoupler output to SDAIN (see the Typical Operating Circuits). Connect SDAIN to SDAOUT if using a 2-wire, I2C-compatible system. 7–10 A3–A0 Address Bits. A3–A0 form the lower part of the device’s address. Address inputs default high with an internal 50kΩ pullup resistor to VDD.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Functional Diagram VDD SCL SHD_ SDAIN SDAOUT OSC_IN DGND CURRENT SENSING VOLTAGE PROBING AND CURRENT-LIMIT CONTROL OSCILLATOR MONITOR THREE-WIRE SERIAL PORT INTERFACE DET_ A0 DETECTION/ CLASSIFICATION SM A1 9-BIT ADC CONVERTER VOLTAGE SENSING OUT_ 10V ACD_ENABLE PORT STATE MACHINE (SM) A2 REGISTER FILE A3 50μA A=3 GATE_ AUTO PWR_EN MIDSPAN CENTRAL LOGIC UNIT (CLU) AC DISCONNECT SIGNAL (ACD) RESET REGI
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The MAX5965A/MAX5965B are quad -48V power controllers designed for use in IEEE 802.3af-compliant/preIEEE 802.3at-compatible PSE. The devices provide PD discovery, classification, current limit, DC and AC load disconnect detections in compliance with the IEEE 802.3af standard. The MAX5965A/MAX5965B are pin compatible with the MAX5952/MAX5945/LTC4258/LTC4259A PSE controllers and provides additional features.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Operation Modes The MAX5965A/MAX5965B contain four independent, but identical state machines to provide reliable and realtime control of the four network ports. Each state machine has four operating modes: auto mode, semiauto mode, manual, and shutdown. Auto mode allows the device to operate automatically without any software supervision.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet An external diode, in series with the DET_ input, restricts PD detection to the first quadrant as specified by the IEEE 802.3af/at standard. To prevent damage to non-PD devices, and to protect themselves from an output short circuit, the MAX5965A/MAX5965B limit the current into DET_ to less than 2mA maximum during PD detection. In midspan mode, the MAX5965A/MAX5965B wait 2.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Powered Device Classification (PD Classification) During the PD classification mode, the MAX5965A/ MAX5965B force a probe voltage (-18V) at DET_ and measure the current into DET_. The measured current determines the class of the PD.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet 150ms 150ms 21.3ms tDETI tDETII tCLASS MAX5965A/MAX5965B 80ms 0V t 0V -4V -9V OUT_ -18V -48V Figure 1a. Detection, Classification, and Power-Up Port Sequence 80ms 0 150ms tDETI 150ms tDETII 21.3ms 21.3ms 21.3ms tCLASSI tCLASSII tCLASSIII 8ms t 8ms 0V -4V -9V OUT_ -18V -48V Figure 1b.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet POK After power-off due to an overcurrent fault, and if the RSTR_EN bit is set, the tFAULT timer is not immediately reset but starts decrementing at the same slower pace. The MAX5965A/MAX5965B allow the port to be powered on only when the tFAULT counter is at zero. This feature sets an automatic duty-cycle protection to the external MOSFET avoiding overheating.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet CL_DISC PORT CLASSIFICATION ENx_CL6 EN_HP_ALL EN_HP_CL6 EN_HP_CL5 RESULT RESULTING ICUT REGISTER BITS EN_HP_CL4 0 Any X X X X X User programmed 1 1 X X X X X ICUT = 110 1 2 X X X X X ICUT = 111 1 0, 3 X X X X X ICUT = 000 1 4, 5 X 0 X X X ICUT = 000 1 5 X 1 X 1 X ICUT = R24h[6:4] 1 5 X 1 X 0 X ICUT = 000 1 4 X 1 X x 1 ICUT = R24h[6:4] 1 4 X 1 X X 0 ICUT = 000 1
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Digital Logic VDD supplies power for the internal logic circuitry. VDD ranges from +3.0V to +5.5V and determines the logic thresholds for the CMOS connections (SDAIN, SDAOUT, SCL, AUTO, SHD_, A_). This voltage range enables the MAX5965A/MAX5965B to interface with a nonisolated low-voltage microcontroller. The MAX5965A/MAX5965B check the digital supply for compatibility with the internal logic.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet I2C-Compatible Serial Interface The MAX5965A/MAX5965B operate as a slave that sends and receives data through an I2C-compatible, 2wire or 3-wire interface. The interface uses a serial-data input line (SDAIN), a serial-data output line (SDAOUT), and a serial-clock line (SCL) to achieve bidirectional communication between master(s) and slave(s).
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Serial Addressing Each transmission consists of a START condition (Figure 6) sent by a master, followed by the MAX5965A/ MAX5965B 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition. Bit Transfer Each clock pulse transfers one data bit (Figure 7). The data on SDA must remain stable while SCL is high.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet is delivering. If it is not, it then backs off and frees the data line. This litigation protocol always allows the part with the lowest address to complete the transmission. The microcontroller can then respond to the interrupt and take proper actions. The MAX5965A/MAX5965B do not reset their own interrupt at the end of the alert response protocol.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Message Format for Reading The MAX5965A/MAX5965B read using the MAX5965A/ MAX5965B’s internally stored command byte as an address pointer, the same way the stored command byte is used as an address pointer for a write. The pointer autoincrements after reading each data byte using the same rules as for a write.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The interrupt register (Table 6) summarizes the event register status and is used to send an interrupt signal (INT goes low) to the controller. Writing a 1 to R1Ah[7] clears all interrupt and events registers. A reset sets R00h to 00h. INT_EN (R17h[7]) is a global interrupt mask (Table 7). The MASK_ bits activate the corresponding interrupt bits in register R00h. Writing a 0 to INT_EN (R17h[7]) disables the INT output.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The power event register (Table 8) records changes in the power status of the four ports. Any change in PGOOD_ (R10h[7:4]) sets PG_CHG_ to 1. Any change in the PWR_EN_ (R10h[3:0]) sets PWEN_CHG_ to 1. PG_CHG_ and PWEN_CHG_ trigger on the edges of PGOOD_ and PWR_EN_ and do not depend on the actual level of the bits. The power event register has two addresses.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet As with any of the other events register, the fault event register has two addresses. When read through the R06h address, the content of the register is left unchanged. When read through the CoR R07h address, the register content is cleared. A reset sets R06h/R07h = 00h. Table 10.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The MAX5965A/MAX5965B continuously monitor the power supplies and set the appropriate bits in the supply event register (Table 12). VDD_OV/VEE_OV is set to 1 whenever VDD/VEE exceeds its overvoltage threshold. V DD_UV /V EE_UV is set to 1 whenever V DD /V EE falls below its undervoltage threshold.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet When 2-event classification is not enabled (ENx_CL6 = 0), the classification status is reported in Table 13c. When 2-event classification is enabled (ENx_CL6 = 1), the CLASS_[2:0] bits are set to 000 and the classification result is reported in locations R2Ch–R2Fh. As a protection, when POFF_CL (R17h[3], Table 21) is set to 1, the MAX5965A/MAX5965B prohibit turning on power to the port that returns a status 111 after classification.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet PGOOD_ is set to 1 (Table 14) at the end of the powerup startup period if the power-good condition is met (0 < (VOUT - VEE) < PGTH). The power-good condition must remain valid for more than t PGOOD to assert PGOOD_. PGOOD_ is reset to 0 whenever the output falls out of the power-good condition. A fault condition immediately forces PGOOD_ low. PWR_EN_ is set to 1 when the port power is turned on.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet A reset sets R12h = AAAAAAAA where A represents the latched-in state of the AUTO input prior to the reset. Use software to change the mode of operation. Software resets of ports (RESET_P_ bit, Table 23) do not affect the mode register. Table 16a.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Setting DET_EN_/CLASS_EN_ to 1 (Table 18) enables load detection/classification, respectively. Detection always has priority over classification. To perform classification without detection, set the DET_EN_ bit low and CLASS_EN_ bit high. In manual mode, R14h works like a pushbutton. Set the bits high to begin the corresponding routine. The bit clears after the routine finishes.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Set the bits in R16h to scale the tSTART, tFAULT, and tDISC to a multiple of their nominal value specified in the Electrical Characteristics table. When the MAX5965A/MAX5965B shut down a port due to an extended overcurrent condition (either during startup or normal operation), if RSTR_EN is set high, the part does not allow the port to power back on before the restart timer (Table 20b) returns to zero.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Setting CL_DISC to 1 (Table 21) enables port over class current protection, where the MAX5965A/MAX5965B scales down the overcurrent limit (VFLT_LIM) according to the port classification status. This feature provides protection to the system against PDs that violate their maximum class current allowance.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet event registers of that port. After execution, the bits reset to 0. Writing a 1 to RESET_IC causes a global software reset, after which the register map is set back to its reset state. A reset sets R1Ah = 00h. Table 23.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Enable 2-event classification for a port by setting the corresponding ENx_CL6 bit (Table 25). When the bit is enabled, the classification cycle will be repeated three times at 21.3ms intervals. The device keeps the output voltage around -9V between each cycle. The repetition of the classification cycles enables discovering of class 6 PDs. The ENx_CL6 bit is active only in auto- or semi-mode.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet the bits in register R12h to 00. A high in HWMODE_ switches the port into auto mode by setting the bits in register R12h to 11. If WD_INT_EN is set, an interrupt is sent if any of the SMODE bits are set. A reset sets R1Fh = 00h. Table 27.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet HP[2:0] programs the default power setting that is written upon the discovery of a class 4, 5, or 6 PD. A reset or power-up sets R24h = 00h. Table 29. High-Power Mode Register ADDRESS = 24h SYMBOL Reserved HP Reserved DESCRIPTION BIT R/W 7 — 6 R/W HP[2] 5 R/W HP[1] 4 R/W HP[0] 3 — Reserved 2 — Reserved 1 — Reserved 0 — Reserved Reserved Table 30.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet desired output power. Table 33 sets the current-limit scaling register. A reset or power-up sets R29h = 00h. Table 32. Miscellaneous Configurations 2 Table 33.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Table 34c. ICUT Register Bit Values for Current-Limit Threshold ICUT_[2:0] (ADDRESS = 2Ah, 2Bh) SCALE FACTOR TYPICAL CURRENT-LIMIT THRESHOLD (mA) 000 1x 375 001 1.5x 563 010 1.75x 656 011 2x 750 100 2.25x 844 101 2.5x 938 110 0.3x Class 1 111 0.53x Class 2 Table 35a.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet CLASS_[5:0] (ADDRESS = 2Ch, 2Dh, 2Eh, 2Fh) CLASS SEQUENCE ICUT[2:0] CLASS_[5:0] (ADDRESS = 2Ch, 2Dh, 2Eh, 2Fh) CLASS SEQUENCE ICUT[2:0] 101010 Illegal 000 110101 Reserved 000 101011 Illegal 000 110110 Reserved 000 101100 Illegal 000 110111 Reserved 000 101101 Illegal 000 111000 Reserved 000 101110 Illegal 000 111001 Reserved 000 101111 Illegal 000 111010 Reserved 000 110000 Reserved 000 111011
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Table 37.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ADDR REGISTER NAME R/W PORT BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 RESET STATE MAXIM RESERVED 20h Reserved — G Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved — 21h Reserved — G Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved — 22h Reserved — G Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved — 23h Program
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet MAX5965A/MAX5965B Applications Information RJ–45 CONNECTOR 1 3 RX1+ RD1+ RX1- RD1- 24 1 22 2 1/2 OF 21 H2005A TX1+ 4 TD1+* 19 TX1- PHY 5 3 6 TD1- -48VOUT 0.1μF RXT1 23 75Ω 4 0.1μF 5 0.1μF TXCT1 75Ω 20 1000pF 250VAC 75Ω 75Ω 7 0.1μF 8 -48VRTN VCC (3.3V) VDD ISOLATION 1.8V TO 5V, (REF TO DGND) 3kΩ AGND VDD 180Ω A0 A1 A2 A3 1kΩ RESET INTERNAL 50kΩ PULLUP 3kΩ HPCL063L SERIAL INTERFACE VCCRTN 4.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet MAX5965A/MAX5965B RJ–45 CONNECTOR 1 2 DATA 3 6 4 5 7 8 -48VOUT -48VRTN VCC (3.3V) VDD ISOLATION 1.8V TO 5V (REF TO DGND) 3kΩ AGND VDD 180Ω A0 A1 A2 A3 1kΩ RESET INTERNAL 50kΩ PULLUP 3kΩ HPCL063L SERIAL INTERFACE VCCRTN 4.
MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet R10 2Ω L1 68μH, DO3308P-683 R6 1Ω D1 DIODES INC.: B1100 C3 15nF C4 220μF Sanyo 6SVPA220MAA R5 1kΩ GND +3.3V R1 2.61kΩ +3.3V 300mA C5 4.7μF Q2 MMBTA56 Q4 MMBTA56 GND GND DRAIN 1 2 3 C6 0.47μF 100V 4 V+ MAX5020 VCC VDD NDRV FB GND SS_SHDN CS 8 R8 30Ω 7 6 Q3 MMBTA56 Q1 Si2328 DS C9 4.7nF SOURCE 5 C7 0.22μF C1 0.1μF C2 0.022μF GATE C8 2.2μF R4 1Ω -48V R9 1Ω R2 6.81kΩ R7 1.02kΩ R3 2.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet DESIGNATION DESCRIPTION DESIGNATION DESCRIPTION C1 0.1µF, 25V ceramic capacitor C2 0.022µF, 25V ceramic capacitor C3 15nF, 25V ceramic capacitor C4 220µF capacitor Sanyo 6SVPA220MAA C5 4.7µF, 16V ceramic capacitor C6 0.47µF, 100V ceramic capacitor R4, R6, R9 C7 0.22µF, 16V ceramic capacitor R5 1kΩ ±1% resistor C8 2.2µF, 16V ceramic capacitor R7 1.02kΩ ±1% resistor C9 4.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet MAX5965A/MAX5965B Typical Operating Circuits -48V RTN OUTPUT TO PORT -48VRTN VCC (3.3V) ISOLATION VDD 1.8V TO 3.7V, (REF TO DGND) 3kΩ AGND VDD 180Ω A0 A1 A2 A3 1kΩ RESET 3kΩ INTERNAL 50kΩ PULLUP SERIAL INTERFACE VCCRTN HPCL063L 180Ω SDAOUT OPTIONAL BUFFER INT 3kΩ AUTO INTERNAL PULLDOWN (MANUAL MODE) MIDSPAN INTERNAL PULLDOWN (SIGNAL MODE) SDAIN MAX5965A MAX5965B HPCL063L SDA OPTIONAL BUFFER 180Ω 4.
High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet -48V RTN OUTPUT TO PORT -48VRTN VCC (3.3V) ISOLATION VDD 1.8V TO 3.7V, (REF TO DGND) 3kΩ AGND VDD 180Ω A0 A1 A2 A3 1kΩ RESET 3kΩ INTERNAL 50kΩ PULLUP SERIAL INTERFACE VCCRTN HPCL063L 180Ω SDAOUT OPTIONAL BUFFER INT 3kΩ AUTO INTERNAL PULLDOWN (MANUAL MODE) MIDSPAN INTERNAL PULLDOWN (SIGNAL MODE) SDAIN MAX5965A MAX5965B HPCL063L SDA OPTIONAL BUFFER 180Ω 4.7kΩ OSC_IN 3kΩ N.C.
Typical Operating Circuits (continued) -48V RTN OUTPUT TO PORT -48VRTN VDD ISOLATION VCC (3.3V) 1.8V TO 3.7V, (REF TO DGND) AGND VDD 180Ω 3kΩ A0 A1 A2 A3 1kΩ RESET INTERNAL 50kΩ PULLUP 3kΩ HPCL063L VCCRTN SERIAL INTERFACE MAX5965A/MAX5965B High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet 4.
