Manual
MAX5961
0 to 16V, Quad, Hot-Swap Controller
with 10-Bit Current and Voltage Monitor
______________________________________________________________________________________ 23
Digital Current Monitoring
The four current-sense signals are sampled by the
internal 10-bit ADC, and the most recent results are
stored in registers for retrieval through the I
2
C interface.
The current conversion values are 10 bits wide, with the
8 high-order bits written to one 8-bit register and the 2
low-order bits written to the next higher 8-bit register
address (Tables 9 and 10). This allows use of just the
high-order byte in applications where 10-bit precision is
not required. This split 8-bit/2-bit storage scheme is
used throughout the MAX5961 for all 10-bit ADC con-
version results and 10-bit digital comparator thresholds.
Once the PG_ output is asserted (see the
Digital Voltage
Monitoring and Power-Good Outputs
section), the most
recent current samples are continuously compared to
the programmable overcurrent warning register values.
If the measured current value exceeds the warning level,
the ALERT output is asserted. The MAX5961 response
to the overcurrent digital comparator is not altered by
the setting of the PROT input (Tables 11 and 12).
Table 8. dac_chx Register Format
Description: Fast-comparator threshold DAC setting
Register Titles: dac_ch1 dac_ch2 dac_ch3 dac_ch4
Register Addresses: 0x5A 0x5B 0x5C 0x5D
R/W R/W R/W R/W R/W R/W R/W R/W
RESET
VALUE
0xBF
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Table 9. ADC Current Conversion Results Register Format (High-Order Bits)
Description: Most recent current conversion result, high-order bits [9:2]
Register Titles: adc_ch1_cs_h adc_ch2_cs_h adc_ch3_cs_h adc_ch4_cs_h
Register Addresses: 0x00 0x04 0x08 0x0C
RRRRRRRR
RESET
VALUE
inew_9 inew_8 inew_7 inew_6 inew_5 inew_4 inew_3 inew_2 0x00
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Table 10. ADC Current Conversion Results Register Format (Low-Order Bits)
Description: Most recent current conversion result, low-order bits [1:0]
Register Titles: adc_ch1_cs_l adc_ch2_cs_l adc_ch3_cs_l adc_ch4_cs_l
Register Addresses: 0x01 0x05 0x09 0x0D
RRRRRRRR
RESET
VALUE
inew_1 inew_0 0x00
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0