Manual

MAX533
2.7V, Low-Power, 8-Bit Quad DAC
with Rail-to-Rail Output Buffers
______________________________________________________________________________________ 15
_________________________________________________________Functional Diagram
MAX533
OUTA
DAC A
DAC B
DAC C
DAC D
REF
DAC
REGISTER A
DECODE
CONTROL
INPUT
REGISTER A
DAC
REGISTER B
INPUT
REGISTER B
DAC
REGISTER C
INPUT
REGISTER C
DAC
REGISTER D
INPUT
REGISTER D
12-BIT
SHIFT
REGISTER
SR
CONTROL
CS DIN
SCLK
OUTB
OUTC
OUTD
DOUT
LDAC
CLR
V
DD
PDE DGND AGND
UPO
OUTC
OUTD
AGND

OUTB
OUTA
REF
SYSTEM GND
Figure 10. Suggested PC Board Layout for Minimizing
Crosstalk (Bottom View)
DAC A
DAC B
DAC C
DAC D
REFAB
MAX533
OUTA
OUTB
OUTC
OUTD
SERIAL
INTERFACE
NOT SHOWN
REFERENCE INPUT
2
1
16
15
V
DD
+3V
313
14 12
AGND
DGND
Figure 11. Unipolar Output Circuit