User Manual

MAX3541
Complete Single-Conversion
Television Tuner
8 _______________________________________________________________________________________
IFVGA VOLTAGE GAIN vs. IFAGC VOLTAGE
IFAGC VOLTAGE (V)
IFVGA VOLTAGE GAIN (dB)
MAX3541 toc21
0.5 1.0 1.5 2.0 2.5 3.0
10
20
30
40
50
60
+25°C
-40°C
+85°C
IFVGA IM3 vs. IFAGC VOLTAGE
IFAGC VOLTAGE (V)
IFVGA IM3 (dBc)
MAX3541 toc22
INPUT POWER (dBm)
-80
-60
-40
-20
0.5 1.0 1.5 2.0 2.5 3.0
-60
-50
-40
-30
-20
P
IN
V
OUT
= 1.5 V
P-P
IM3
Pin Description
Typical Operating Characteristics (continued)
(MAX3541EV kit, V
CC
= +3.3V, V
IFAGC
= 3.0V, V
RFAGC
= 3.0V, T
A
= +25°C, unless otherwise noted.)
PIN NAME DESCRIPTION
1 SCL 2-Wire Serial-Clock Interface. Requires a pullup resistor to V
CC
.
2 SDA 2-Wire Serial-Data Interface. Requires a pullup resistor to V
CC
.
3, 10, 23, 28,
32, 33, 37,
41, 44
V
CC
Power Supply Connections. Bypass each supply pin to ground with a 1000pF capacitor.
4 UHF_IN UHF RF Input. Requires a DC-blocking capacitor.
5 VHF_IN VHF RF Input. Requires a DC-blocking capacitor.
6 RFGND2
RF Ground. Bypass to the PCB’s ground plane with a 1000pF capacitor. Do not connect RFGND2
and RFGND3 together.
7 LEXT RF VGA Supply Voltage. Connect through a 270nH pullup inductor to V
CC
.
8 RFGND3
RF Ground. Bypass to the PCB’s ground plane with a 1000pF capacitor. Do not connect RFGND2
and RFGND3 together.
9 RFAGC RF V G A G ai n C ontr ol V ol tag e. Accep ts a D C vol tag e fr om 0.5V ( m i ni m um g ai n) to 3V ( m axi m um g ai n) .
11–22, 27, 31 GND Ground. Connect to the PCB’s ground plane.
24 IFOUT2- Inver ti ng IF V G A Outp ut. C onnect to the i np ut of an anti - al i asi ng fi l ter . Req ui r es a D C - b l ocki ng cap aci tor .
25 IFOUT2+ N oni nver ti ng IF V GA O utp ut. C onnect to the i np ut of an anti - al i asi ng fi l ter . Req ui r es a D C - b l ocki ng cap aci tor .
26 IFAGC IF VGA Gain Control Voltage. Accepts a DC voltage from 0.5V (minimum gain) to 3V (maximum gain).
29 IFIN- Inverting IF VGA Input. Connect to the output of an IF-SAW filter.
30 IFIN+ Noninverting IF VGA Input. Connect to the output of an IF-SAW filter.
34 IFOVLD IF Overload Detector Open-Collector Output. Requires a 10kΩ pullup resistor to V
CC
.
35 IFOUT1+ Noninverting IF LNA Output. Requires a DC-blocking capacitor.
36 IFOUT1- Inverting IF LNA Output. Requires a DC-blocking capacitor.
38 LDO VCO LDO Bypass. Bypass to ground with a 0.47μF capacitor.