Owner manual

_______________________________________________________________________________________ 5
MAX2062
Dual 50MHz to 1000MHz High-Linearity,
Serial/Parallel-Controlled Analog/Digital VGA
5.0V SUPPLY AC ELECTRICAL CHARACTERISTICS (Each Path, Unless Otherwise
Noted) (continued)
(Typical Application Circuit, V
CC
= V
CC_AMP_1
= V
CC_AMP_2
= V
CC_RG
= 4.75V to 5.25V, attenuators are set for maximum gain, RF
ports are driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, 100MHz P f
RF
P 500MHz, T
C
= -40NC to +85NC. Typical values
are at maximum gain setting, V
CC
= 5.0V, P
IN
= -20dBm, f
RF
= 350MHz, and T
C
= +25NC, unless otherwise noted.) (Note 6)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Attenuation Range
f
RF
= 350MHz, T
C
= +25NC, V
CC
= 5.0V
29.5 33.2 dB
Gain Control Slope Analog control input -13.3 dB/V
Maximum Gain Control Slope Over analog control input range -35.2 dB/V
Insertion Phase Change Over analog control input range 17.6 Deg
Attenuator Response Time
RF settled to
within Q0.5dB
AA_SP = 0, V
A_VCTL__
from 2.75V to 0.25V
500
ns
AA_SP = 1, DAC code
from 11111111 to
00000000, from CS rising
edge
500
AA_SP = 0, V
A_VCTL__
from 0.25V to 2.75V
500
AA_SP = 1, DAC code
from 00000000 to
11111111, from CS rising
edge
500
Group Delay vs. Control Voltage
Over analog control input from 0.25V to
2.75V
-0.34 ns
Analog Control Input Range 0.25 2.75 V
Analog Control Input Impedance 19.2
kI
Input Return Loss
50I source
16.1 dB
Output Return Loss
50I load
16.8 dB
D/A CONVERTER
Number of Bits 8 Bits
Output Voltage
DAC code = 00000000 0.35
V
DAC code = 11111111 2.7
SERIAL PERIPHERAL INTERFACE (SPI)
Maximum Clock Speed 20 MHz
Data-to-Clock Setup Time t
CS
2 ns
Data-to-Clock Hold Time t
CH
2.5 ns
Clock-to-CS Setup Time
t
ES
3 ns
CS Positive Pulse Width
t
EW
7 ns
CS Setup Time
t
EWS
3.5 ns
Clock Pulse Width t
CW
5 ns