User guide

MAX1272/MAX1273
Fault-Protected, 12-Bit ADCs
with Software-Selectable Input Range
14 ______________________________________________________________________________________
SPI and MICROWIRE Interface
When using the SPI (Figure 10a) or MICROWIRE (Figure
10b) interfaces, set CPOL = 0 and CPHA = 0 in the SPI
master. Conversion begins with a falling edge on CS.
Three consecutive 8-bit readings are necessary to
obtain the entire 12-bit result from the ADC. DOUT data
transitions on the serial clock’s falling edge. The first 8-
bit data stream contains all leading zeros. The second
8-bit data stream contains a leading zero followed by
the MSB through D5. The third 8-bit data stream con-
tains D4–D0 followed by trailing zeros.
1
8
16
24
32
D11
D10
D9
D8
D0
D1
D2
D3
D4
D5
D6
D7
DIN
DOUT
SCLK
ACQUISITION
4 SCLKs
CONVERSION
12 SCLKs
MSB LSBHI-Z HI-Z
START
RNG
BIP
M
ODE1
0
0
RESERVED
REF
START
RNG
BIP
MODE1
PD
MODE0
RESERVED
REF
POWERED UP
POWERED UP
POWERED DOWN
CS
Figure 8. Delayed Power-Down Timing
1
8
16
24
32
CS
DIN
DOUT
SCLK
ACQUISITION
4 SCLKs
HI-Z HI-Z
START
RNG
BIP
MODE1
0
1
RESERVED
REF
START
RNG
BIP
MODE1
PD
MODE0
RESERVED
REF
POWERED UP
POWERED UP
POWERED DOWN
Figure 9. Immediate Power-Down Timing