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General Description

The MAX1207 is a 3.3V, 12-bit analog-to-digital converter

(ADC) featuring a fully differential wideband track-and-

hold (T/H) input, driving the internal quantizer. The

MAX1207 is optimized for low power, small size, and

high dynamic performance. This ADC operates from a

single 3.0V to 3.6V supply, consuming only 316mW,

while delivering a typical signal-to-noise ratio (SNR) per-

formance of 68.5dB at a 32.5MHz input frequency. The

T/H-driven input stage accepts single-ended or differen-

tial inputs. In addition to low operating power, the

MAX1207 features a 0.15mW power-down mode to con-

serve power during idle periods.

A flexible reference structure allows the MAX1207 to

use its internal precision bandgap reference or accept

an externally applied reference. A common-mode refer-

ence is provided to simplify design and reduce external

component count in differential analog input circuits.

The MAX1207 supports both a single-ended and differ-

ential input clock drive. Wide variations in the clock

duty cycle are compensated with the ADC’s internal

duty-cycle equalizer.

The MAX1207 features parallel, CMOS-compatible out-

puts. The digital output format is pin selectable to be

either two’s complement or Gray code. A data-valid indi-

cator eliminates external components that are normally

required for reliable digital interfacing. A separate power

input for the digital outputs accepts a voltage from 1.7V

to 3.6V for flexible interfacing with various logic levels.

The MAX1207 is available in a 6mm x 6mm x 0.8mm, 40-

pin thin QFN package with exposed paddle (EP), and is

specified for the extended industrial (-40°C to +85°C)

temperature range.

Refer to the MAX1209 and MAX1211 (see Pin Compatible

Higher/Lower Speed Versions table) for applications

that require high dynamic performance for IF input fre-

quencies.

Applications

Communication Receivers

Cellular, LMDS, Point-to-Point Microwave,

MMDS, HFC, WLAN

Ultrasound and Medical Imaging

Portable Instrumentation

Low-Power Data Acquisition

Features

♦ Excellent Dynamic Performance

68.5dB SNR at f

= 32.5MHz

88.7dBc SFDR at f

= 32.5MHz

♦ 3.3V Low-Power Operation

316mW (Single-Ended Clock Mode)

342mW (Differential Clock Mode)

♦ Differential or Single-Ended Clock

♦ Accepts 20% to 80% Clock Duty Cycle

♦ Fully Differential or Single-Ended Analog Input

♦ Adjustable Full-Scale Analog Input Range

♦ Common-Mode Reference

♦ Power-Down Mode

♦ CMOS-Compatible Outputs in Two’s Complement

or Gray Code

♦ Data-Valid Indicator Simplifies Digital Design

♦ Out-of-Range and Data-Valid Indicators

♦ Miniature, 40-Pin Thin QFN Package with Exposed

Paddle

♦ Pin-Compatible, IF Sampling ADC Available

(MAX1211ETL)

♦ Evaluation Kit Available (Order MAX1211EVKIT)

MAX1207

65Msps, 12-Bit ADC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3260; Rev 0; 5/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART

TEMP RANGE

PIN-PACKAGE

MAX1207ETL -40°C to +85°C

40 Thin QFN (6mm x 6mm)

Pin-Compatible Higher/Lower

Speed Versions

PART

SPEED GRADE

(Msps)

TARGET

APPLICATION

MAX1206 40 Baseband

MAX1207 65 Baseband

MAX1208 80 Baseband

MAX1211 65 IF

MAX1209 80 IF

Pin Configuration appears at end of data sheet.

Summary of content (29 pages)

PAGE 1
9-3260; Rev 0; 5/04 KIT ATION EVALU E L B AVAILA 65Msps, 12-Bit ADC Features The MAX1207 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-andhold (T/H) input, driving the internal quantizer. The MAX1207 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 316mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.5dB at a 32.5MHz input frequency.
PAGE 2
MAX1207 65Msps, 12-Bit ADC ABSOLUTE MAXIMUM RATINGS VDD to GND ...........................................................-0.3V to +3.6V OVDD to GND........-0.3V to the lower of (VDD + 0.3V) and +3.6V INP, INN to GND ...-0.3V to the lower of (VDD + 0.3V) and +3.6V REFIN, REFOUT, REFP, REFN, COM to GND.....-0.3V to the lower of (VDD + 0.3V) and +3.6V CLKP, CLKN, CLKTYP, G/T, DCE, PD to GND ........-0.3V to the lower of (VDD + 0.3V) and +3.6V D11–D0, I. C., DAV, DOR to GND ...........-0.3V to (OVDD + 0.
PAGE 3
65Msps, 12-Bit ADC (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP fIN = 3MHz at -0.
PAGE 4
MAX1207 65Msps, 12-Bit ADC ELECTRICAL CHARACTERISTICS (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
65Msps, 12-Bit ADC (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 6
MAX1207 65Msps, 12-Bit ADC ELECTRICAL CHARACTERISTICS (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 7
65Msps, 12-Bit ADC -50 HD3 HD2 -80 -30 -40 -50 0 MAX1207 toc02 -20 -60 -70 fCLK = 65.0036Msps fIN = 32.367MHz AIN = -0.47dBFS SNR = 68.55dBc SINAD = 68.50dBc THD = -87.2dBc SFDR = 89.
PAGE 8
Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS differential input, DCE = high, CLKTYP = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = +25°C, unless otherwise noted.) fIN = 32.
PAGE 9
65Msps, 12-Bit ADC fIN = 70.1MHz 70 68 69 68 67 SINAD (dB) SNR (dB) 67 66 65 64 65 64 63 62 62 61 61 60 60 10 15 20 25 30 35 40 45 50 55 60 65 10 15 20 25 30 35 40 45 50 55 60 65 fCLK (MHz) fCLK (MHz) TOTAL HARMONIC DISTORTION vs. SAMPLING RATE SPURIOUS-FREE DYNAMIC RANGE vs. SAMPLING RATE 100 MAX1207 toc14 fIN = 70.1MHz -65 -70 90 -75 85 -80 fIN = 70.1MHz 95 SFDR (dBc) THD (dBc) 66 63 -60 fIN = 70.
PAGE 10
Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS differential input, DCE = high, CLKTYP = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = +25°C, unless otherwise noted.) SIGNAL-TO-NOISE RATIO vs.
PAGE 11
65Msps, 12-Bit ADC SIGNAL-TO-NOSIE RATIO vs. ANALOG INPUT POWER 60 60 SINAD (dB) 65 55 50 50 45 45 40 40 35 35 -25 -20 -15 -10 -5 0 -30 -25 -20 -15 -10 -5 ANALOG INPUT POWER (dBFS) TOTAL HARMONIC DISTORTION vs. ANALOG INPUT POWER SPURIOUS-FREE DYNAMIC RANGE vs. ANALOG INPUT POWER -55 fIN = 32.129882MHz 95 -60 fIN = 32.129882MHz 90 85 -70 80 SFDR (dBc) -65 -75 0 MAX1207 toc23 ANALOG INPUT POWER (dBFS) MAX1207 toc22 -30 THD (dBc) fIN = 32.
PAGE 12
Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS differential input, DCE = high, CLKTYP = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = +25°C, unless otherwise noted.) SIGNAL-TO-NOISE RATIO vs.
PAGE 13
65Msps, 12-Bit ADC SIGNAL-TO-NOISE RATIO + DISTORTION vs. ANALOG INPUT COMMON-MODE VOLTAGE SIGNAL-TO-NOISE RATIO vs. ANALOG INPUT COMMON-MODE VOLTAGE fIN = 32.1271954MHz 70.0 69.0 69.5 68.5 68.0 SINAD (dB) 67.5 67.0 68.0 67.5 67.0 66.5 66.5 66.0 66.0 65.5 65.5 65.0 65.0 0.15 0.65 1.15 1.65 2.15 2.65 3.15 0.15 0.65 1.15 1.65 2.15 2.65 3.15 ANALOG INPUT COMMON-MODE VOLTAGE (V) ANALOG INPUT COMMON-MODE VOLTAGE (V) TOTAL HARMONIC DISTORTION vs.
PAGE 14
Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS differential input, DCE = high, CLKTYP = high, PD = low, G/T = low, fCLK = 65MHz (50% duty cycle), CREFP = CREFN = 0.1µF in parallel with 10µF to GND, 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = +25°C, unless otherwise noted.) SIGNAL-TO-NOISE RATIO vs. TEMPERATURE 70 MAX1207 toc32 fIN = 32.
PAGE 15
65Msps, 12-Bit ADC OFFSET ERROR vs. TEMPERATURE GAIN ERROR vs. TEMPERATURE VREFIN = 2.048V 0.35 -0.16 GAIN ERROR (%FR) OFFSET ERROR (%FS) -0.14 0.40 -0.18 -0.20 -0.22 MAX1207 toc37 VREFIN = 2.048V MAX1207 toc36 -0.12 0.30 0.25 0.20 0.15 -0.24 0.10 -0.26 -0.28 0 -40 -15 10 35 60 85 -40 TEMPERATURE (°C) -15 10 35 60 85 TEMPERATURE (°C) Pin Description PIN NAME FUNCTION 1 REFP Positive Reference I/O. Conversion range is ±(VREFP - VREFN). Bypass REFP to GND with a 0.
PAGE 16
MAX1207 65Msps, 12-Bit ADC Pin Description (continued) PIN NAME 11 CLKTYP Clock Type Definition Input. Connect CLKTYP to GND to define the single-ended clock input. Connect CLKTYP to OVDD or VDD to define the differential clock input. 12–15, 36 VDD Analog Power Input. Connect VDD to a 3.0V to 3.6V power supply. Bypass VDD to GND with a parallel capacitor combination of ≥2.2µF and 0.1µF. Connect all VDD pins to the same potential. 17, 34 OVDD Output Driver Power Input. Connect OVDD to a 1.
PAGE 17
65Msps, 12-Bit ADC The MAX1207 uses a 10-stage, fully differential, pipelined architecture (Figure 1) that allows for highspeed conversion while minimizing power consumption. Samples taken at the inputs move progressively through the pipeline stages every half clock cycle. From input to output, the total clock-cycle latency is 8.5 clock cycles. Each pipeline converter stage converts its input voltage into a digital output code.
PAGE 18
MAX1207 65Msps, 12-Bit ADC Table 1. Reference Modes VREFIN REFERENCE MODE 35% VREFOUT to 100% VREFOUT Internal reference mode. REFIN is driven by REFOUT either through a direct short or a resistive divider. VCOM = VDD / 2, VREFP = VDD / 2 + VREFIN / 4, and VREFN = VDD / 2 - VREFIN / 4. 0.7V to 2.3V Buffered external reference mode. An external 0.7V to 2.3V reference voltage is applied to REFIN. VCOM = VDD / 2, VREFP = VDD / 2 + VREFIN / 4, and VREFN = VDD / 2 - VREFIN / 4. <0.
PAGE 19
65Msps, 12-Bit ADC VDD S1H   1 SNR = 20 × log   2 × π × fIN × t J  where fIN represents the analog input frequency and tJ is the total system clock jitter. Clock jitter is especially critical for undersampling applications. For example, assuming that clock jitter is the only noise source, to obtain the specified 68.5dB of SNR with an input frequency of 32.5MHz, the system must have less than 1.8ps of clock jitter. MAX1207 edge to have the lowest possible jitter.
PAGE 20
MAX1207 65Msps, 12-Bit ADC Table 2. Output Codes vs. Input Voltage GRAY CODE OUTPUT CODE T = 1) (G/T TWO’S COMPLEMENT OUTPUT CODE T = 0) (G/T DECIMAL HEXADECIMAL EQUIVALENT EQUIVALENT DOR OF OF D11 D0 D11 D0 (CODE10) BINARY D11 D0 DECIMAL HEXADECIMAL EQUIVALENT EQUIVALENT DOR OF OF D11 D0 D11 D0 (CODE10) BINARY D11 D0 VINP - VINN VREFP = 2.162V VREFN = 1.138V ) ( 1000 0000 0000 1 0x800 +4095 0111 1111 1111 1 0x7FF +2047 >+1.
PAGE 21
65Msps, 12-Bit ADC TWO'S COMPLEMENT OUTPUT CODE (LSB) Digital Output Data (D0–D11), Output Format (G/T) The MAX1207 provides a 12-bit, parallel, tri-state output bus. D0–D11 and DOR update on the falling edge of DAV and are valid on the rising edge of DAV. The MAX1207 output data format is either Gray code or two’s complement, depending on the logic input G/T. With G/T high, the output data format is Gray code. With G/T low, the output data format is two’s complement.
PAGE 22
MAX1207 65Msps, 12-Bit ADC BINARY-TO-GRAY CODE CONVERSION GRAY-TO-BINARY CODE CONVERSION 1) THE MOST SIGNIFICANT GRAY-CODE BIT IS THE SAME AS THE MOST SIGNIFICANT BINARY BIT. 1) THE MOST SIGNIFICANT BINARY BIT IS THE SAME AS THE MOST SIGNIFICANT GRAY-CODE BIT.
PAGE 23
65Msps, 12-Bit ADC • REFP, COM, REFN go high impedance with respect to VDD and GND, but there is an internal 4kΩ resistor between REFP and COM, as well as an internal 4kΩ resistor between REFN and COM. • D0–D11, DOR, and DAV go high impedance. • CLKP, CLKN clock inputs go high impedance (Figure 4). The wake-up time from power-down mode is dominated by the time required to charge the capacitors at REFP, REFN, and COM.
PAGE 24
MAX1207 65Msps, 12-Bit ADC 0Ω* INP 0.1µF 1 VIN N.C. 2 3 T1 6 5 4 MINICIRCUITS ADT1-1WT 1 49.9Ω 0.5% N.C. 49.9Ω 0.5% T1 6 2 5 3 4 12pF 49.9Ω 0.5% N.C. 0.1µF MAX1207 COM 4.7µF MINICIRCUITS ADT1-1WT 49.9Ω 0.5% 0Ω* INN *0Ω RESISTORS CAN BE REPLACED WITH LOW-VALUE RESISTORS TO LIMIT THE INPUT BANDWIDTH. 12pF Figure 10.
PAGE 25
65Msps, 12-Bit ADC 2.2µF 0.1µF VDD 39 1 2 16.2kΩ 3 *1µF MAX1207 MAX4250 5 MAX6062 1 0.1µF 0.1µF 0.1µF REFP REFIN REFN 2 2.048V 47Ω 1 0.1µF 1µF 4 3 2 10µF 6V 10µF 0.1µF 47µF 6V 38 REFOUT 0.1µF COM 3 0.1µF GND 2.2µF 1.47kΩ NOTE: ONE FRONT-END REFERENCE CIRCUIT PROVIDES ±15mA OF OUTPUT DRIVE. +3.3V 2.2µF 0.1µF VDD 39 REFIN REFP 1 0.1µF *1µF MAX1207 REFN 0.1µF 10µF 2 0.1µF 38 * PLACE AS CLOSE TO THE DEVICE AS POSSIBLE. 0.1µF REFOUT COM GND 3 0.1µF 2.
PAGE 26
Figure 13. External Unbuffered Reference Driving 8 ADCs with MAX4254 and MAX6066 ______________________________________________________________________________________ 13 12 11 4 14 1µF 3 MAX4254 1/4 0.1µF UNCOMMITTED * PLACE AS CLOSE TO THE DEVICE AS POSSIBLE. 1MΩ 1MΩ +3.3V 1 MAX6066 NOTE: ONE FRONT-END REFERENCE CIRCUIT SUPPORTS UP TO 8 MAX1207s. 0.1µF +3.3V 2 2.500V 21.5kΩ 1% 21.5kΩ 1% 21.5kΩ 1% 21.5kΩ 1% 21.
PAGE 27
65Msps, 12-Bit ADC CLKN CLKP tAD ANALOG INPUT Signal-to-Noise Plus Distortion (SINAD) tAJ SINAD is computed by taking the ratio of the RMS signal to the RMS noise plus distortion. RMS noise plus distortion includes all spectral components to the Nyquist frequency, excluding the fundamental and the DC offset. SAMPLED DATA T/H HOLD TRACK HOLD Effective Number of Bits (ENOB) ENOB specifies the dynamic performance of an ADC at a specific input frequency and sampling rate.
PAGE 28
Intermodulation Distortion (IMD) • 5th-order intermodulation products: 3 x f1 - 2 x f2, 3 x f2 - 2 x f1, 3 x f1 + 2 x f2, 3 x f2 + 2 x f1 3rd-Order Intermodulation (IM3) IM3 is the total power of the 3rd-order intermodulation products to the Nyquist frequency relative to the total input power of the two input tones f1 and f2. The individual input tone levels are at -7dBFS. The 3rd-order intermodulation products are 2 x f1 - f2, 2 x f2 - f1, 2 x f1 + f2, 2 x f2 + f1. 28 31 I.C. 32 I.C.
PAGE 29
65Msps, 12-Bit ADC QFN THIN 6x6x0.8.EPS Note: For the MAX1207 exposed pad variations, the package code is T4066-3. D2 D CL D/2 b D2/2 k E/2 E2/2 (NE-1) X e E CL E2 k e L (ND-1) X e e L CL CL L1 L L e A1 A2 e A PACKAGE OUTLINE 36, 40, 48L THIN QFN, 6x6x0.8mm 21-0141 E 1 2 NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4.