User Manual
MAX1200
+5V Single-Supply, 1Msps, 16-Bit
Self-Calibrating ADC
12 ______________________________________________________________________________________
Table 1. Two’s Complement Output Codes
Signal-to-Noise
Plus Distortion (SINAD)
SINAD is the ratio of the fundamental input frequency’s
RMS amplitude to all other ADC output signals:
SINAD (dB) = 20log [Signal
RMS
/ (Noise +
Distortion)
RMS
]
Effective Number of Bits (ENOB)
ENOB indicates the global accuracy of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. With an
input range equal to the full-scale range of the ADC, the
effective number of bits can be calculated as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is the ratio of the RMS sum of the first nine har-
monics of the input signal to the fundamental itself. This
is expressed as:
where V
1
is the fundamental amplitude, and V
2
through
V
9
are the amplitudes of the 2nd through 9th-order har-
monics.
Spurious-Free
Dynamic Range (SFDR)
SFDR is the ratio of RMS amplitude of the fundamental
(maximum signal component) to the RMS value of the
next largest spurious component, excluding DC offset.
Grounding and Power-Supply Decoupling
Grounding and power-supply decoupling strongly influ-
ence the performance of the MAX1200. At 16-bit reso-
lution, unwanted digital crosstalk may couple through
the input, reference, power supply, and ground con-
nections; this adversely affects the SNR or SFDR. In
addition, electromagnetic interference (EMI) can either
couple into or be generated by the MAX1200.
Therefore, grounding and power-supply decoupling
guidelines should be closely followed.
First, a multilayer printed circuit board (PCB) with sepa-
rate ground and power-supply planes is recommend-
ed. Run high-speed signal traces directly above the
ground plane. Since the MAX1200 has separate analog
and digital ground buses (AGND and DGND respec-
tively), the PCB should also have separate analog and
digital ground sections connected at only one point
(star ground). Digital signals should run above the digi-
tal ground plane and analog signals should run above
the analog ground plane. Digital signals should be kept
far away from the sensitive analog inputs, reference
input senses, common-mode input, and clock input.
THD 20log
V
V
2
2
VV V
=
+++⋅⋅⋅+
3
2
4
2
9
2
1
SCALE OFFSET BINARY ONE’S COMPLEMENT TWO’S COMPLEMENT
+FSR - 1LSB 1111 .... 1111 0111 .... 1111 0111 .... 1111
+3/4FSR 1110 .... 0000 0110 .... 0000 0110 .... 0000
+1/2FSR 1100 .... 0000 0100 .... 0000 0100 .... 0000
+1/4FSR 1010 .... 0000 0010 .... 0000 0010 .... 0000
+0 1000 .... 0000 0000 .... 0000 0000 .... 0000
-0 —— .... —— —— .... —— 1111 .... 1111
-1/4FSR 0110 .... 0000 1110 .... 0000 1101 .... 1111
-1/2FSR 0100 .... 0000 1100 .... 0000 1011 .... 1111
-3/4FSR 0010 .... 0000 1010 .... 0000 1001 .... 1111
-FSR +1LSB 0000 .... 0001 1000 .... 0001 1000 .... 0000
-FSR 0000 .... 0000 1000 .... 0000 —— .... ——