User Manual

MAX11008
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
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I
2
C HIGH-SPEED-MODE TIMING CHARACTERISTICS (Notes 14, 15, Figure 4)
(DV
DD
= +2.7V to +5.25V, AV
DD
= +4.75V to +5.25V, V
DGND
= V
AGND
= 0, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V,
C
REF
= 0.1µF, T
A
= -40°C to +85°C, unless otherwise noted.)
C
B
= 100pF max C
B
= 400pF
PARAMETER SYMBOL CONDITIONS
MIN MAX MIN MAX
UNITS
Serial Clock Frequency f
SCL
0 3.4 0 1.7 MHz
Setup Time (Repeated) START
Condition
t
SU:STA
160 160 ns
Hold Time (Repeated) START
Condition
t
HD:STA
160 160 ns
SCL Pulse-Width Low t
LOW
160 320 ns
SCL Pulse-Width High t
HIGH
80 120 ns
Data Setup Time t
SU:DAT
10 10 ns
Data Hold Time t
HD:DAT
(Note 17) 4 70 4 150 ns
SCL Rise Time t
RCL
10 40 20 80 ns
SCL Rise Time t
RCL1
After a repeated START
condition and after an
acknowledge bit
10 80 20 160 ns
SCL Fall Time t
FCL
10 40 20 80 ns
SDA Rise Time t
RDA
10 80 20 160 ns
SDA Fall Time t
FDA
10 80 20 160 ns
Setup Time for STOP Condition t
SU:STO
160 160 ns
Capacitive Load for Each Bus Line C
B
(Note 20) 100 400 ns
Pulse Width of Spikes Suppressed
by the Input Filter
t
SP
(Note 21) 0 10 0 10 ns
MISCELLANEOUS TIMING CHARACTERISTICS (Note 15)
(DV
DD
= +2.7V to +5.25V, AV
DD
= +4.75V to +5.25V, V
DGND
= V
AGND
= 0, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V,
C
REF
= 0.1µF, T
A
= -40°C to +85°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Minimum Time to Wait After a Write
Command Before Reading Back
Data from the Same Location
t
RDBK
(Note 22) 1 µs
CNVST Active-Low Pulse Width in
ADC Clock Mode 01
t
CNV01
20 ns
CNVST Active-Low Pulse Width in
ADC Clock Mode 11 to Initiate a
Temperature Conversion
t
CNV11
20 ns
CNVST Active-Low Pulse Width in
ADC Clock Mode 11 for ADCIN1/2
Acquisition
t
ACQ11A
1.5 µs
ADC Power-Up Time (External
Reference)
t
APUEXT
1.1 µs
ADC Power-Up Time (Internal
Reference)
t
APUINT
70 µs