User guide

DS4426
I
2
C Communication
Writing to a Slave: The master must generate a START
condition, write the slave address byte (R/W = 0), write
the memory address, write the byte of data, and gener-
ate a STOP condition. Remember that the master must
read the slave’s acknowledgement during all byte-write
operations.
Reading from a Slave: To read from the slave, the
master generates a START condition, writes the slave
address byte with R/W = 1, reads the data byte with a
NACK to indicate the end of the transfer, and generates
a STOP condition.
Quad-Channel, I
2
C-Margining IDACs with
Three Channels of Power-Supply Tracking
12 ______________________________________________________________________________________
SLAVE
ADDRESS*
START
START
1 0 0 1 0 A1 A0 R/W
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MSB LSB MSB LSB MSB LSB
b7 b6 b5 b4 b3 b2 b1 b0
READ/
WRITE
REGISTER/MEMORY ADDRESS
b7 b6 b5 b4 b3 b2 b1 b0
DATA
STOP
START
REPEATED
START
91h
MASTER
NACK
STOP10010000 11111 000
F8h
10010 001
10010000 11111 001 00000000
90h F9h
STOP
DATA
EXAMPLE I
2
C TRANSACTIONS (WHEN A0 AND A1 ARE GROUNDED)
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PINS A0 AND A1.
TYPICAL I
2
C WRITE TRANSACTION
90h
SINGLE-BYTE WRITE
-WRITE REGISTER F9h TO 00h
A)
SINGLE-BYTE READ
-READ REGISTER F8h
B)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
Figure 7. I
2
C Communication Examples
SCL
NOTE: TIMING IS REFERENCED TO V
IL(MAX)
AND V
IH(MIN)
.
SDA
STOP START REPEATED
START
t
BUF
t
HD:STA
t
HD:DAT
t
SU:DAT
t
SU:STO
t
HD:STA
t
SP
t
SU:STA
t
HIGH
t
R
t
F
t
LOW
Figure 6. I
2
C Timing Diagram