Manual

DS3170 DS3/E3 Single-Chip Transceiver
45 of 233
Figure 7-23. SPI Serial Port Access For Write Mode, SPI_CPOL = 0, SPI_CPHA = 0
0A13
LSBMSB
SCK
CS*
MOSI
MISO
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
A4 A3 A2 A1 A0
LSBMSB
A12A11A10A9A8A7A6A5
B
Figure 7-24. SPI Serial Port Access For Write Mode, SPI_CPOL = 1, SPI_CPHA = 0
SCK
CS*
0
A13
LSBMSB
MOSI
MISO
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
A4 A3 A2 A1 A0
LSBMSB
A12A11A10A9A8A7A6A5
B
Figure 7-25. SPI Serial Port Access For Write Mode, SPI_CPOL = 0, SPI_CPHA = 1
SCK
CS*
0A13
LSBMSB
MOSI
MISO
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
A4 A3 A2 A1 A0
LSBMSB
A12A11A10A9A8A7A6A5
B
Figure 7-26. SPI Serial Port Access For Write Mode, SPI_CPOL = 1, SPI_CPHA = 1
SCK
CS*
0
A13
LSBMSB
MOSI
MISO
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
A4 A3 A2 A1 A0
LSBMSB
A12A11A10A9A8A7A6A5
B
7.3.4.2 Parallel Port Interface Diagrams
Figure 7-27
and Figure 7-29 show examples of a 16-bit databus and an 8-bit databus, respectively. In 16-bit mode,
the A[0]/BSWAP signal controls whether or not to byte swap. In 8-bit mode, the A[0]/BSWAP signal is used as the
LSB of the address bus (A[0]). The selection of databus size is determined by the WIDTH input signal. See also
Section 9.1.1
.