Manual

DS3170 DS3/E3 Single-Chip Transceiver
34 of 233
PIN NAME TYPE PIN DESCRIPTION
address systems. When it is high the address is fed through the address latch to the
internal logic. When it transitions to low, the address is latched and held internally
until the signal goes back high. ALE should be tied high for nonmultiplexed address
systems.
CS
I Chip Select (active low)
CS: This signal must be low during all accesses to the registers
RD /
DS
I Read Strobe (active low) / Data Strobe (active low)
RD: Read Strobe mode (MODE=0):
RD is low during a register read.
DS: Data Strobe mode (MODE=1):
DS is low during either a register read or a write.
WR /
R/
W
I Write Strobe (active low) / R/W Select
WR: Write Strobe mode (MODE=0):
WR is low during a register write.
R/
W: Data Strobe mode (MODE=1):
R/
W is high during a register read cycle, and low during a register write cycle.
RDY
Oz Ready handshake (active low)
RDY: This ready signal is driven low when the current read or write cycle can
progress. When the current read or write cycle is not ready it is driven high. When
device is not selected it is not driven. Not driven when
RST=0 or CS=1.
INT
Oz Interrupt (active low)
INT: This interrupt signal is driven low when an event is detected on any of the
enabled interrupt sources in any of the register banks. When there are no active and
enabled interrupt sources, the pin can be programmed to either drive high or not drive
high. The reset default is to not drive high when there are no active and enabled
interrupt source. All interrupt sources are disabled when
RST =0 and they must be
programmed to be enabled.
Not driven when
RST=0.
MODE I
Mode select
RD/WR or DS strobe mode
MODE: 1 = Data Strobe Mode, 0 = Read/Write Strobe Mode
WIDTH I Data bus width select 8 or 16-bit interface
WIDTH: 1 = 16-bits, 0 = 8 bits
SPI I SPI Serial Bus Mode Select
SPI: 1 = SPI Serial Bus Mode, 0 = Parallel Bus Mode
Misc I/O
GPIO1 IO General Purpose IO 1
GPIO1: This signal is configured to be a general purpose IO pin, or an alarm output
signal.
GPIO2 IO General Purpose IO 2
GPIO2: This signal is configured to be a general purpose IO pin, or the 8KREFO
output signal, or an alarm output signal.
GPIO3 IO General Purpose IO 3
GPIO3: This signal is configured to be a general purpose IO pin.
GPIO4 IO General Purpose IO 4
GPIO4: This signal is configured to be a general purpose IO pin, or the 8KREFI input
signal. When configured for 8KREFI mode the signal frequency should be 8,000 Hz
+/- 500 ppm and about 50% duty cycle.
GPIO5 IO General Purpose IO 5
GPIO5: This signal is configured to be a general purpose IO pin, or an alarm output
signal.
GPIO6 IO General Purpose IO 6
GPIO6: This signal is configured to be a general purpose IO pin, or the TMEI input
signal. When configured for TMEI input, the signal low time and high time must be
greater than 500 nsec.
GPIO7 IO General Purpose IO 7