Manual

DS3170 DS3/E3 Single-Chip Transceiver
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Figure 1-2. Block Diagram
TSOFO/TDEN
RLCLK
RXP
RXN
TPOS/TDAT
TNEG
TLCLK
DS3/E3
Transmit
LIU
IEEE P1149.1
JTAG Test
Access Port
D[15:0]
A[8:1]
ALE
CS
RD/DS
WR/R/W
Serial or Parallel
uP Inteface
JTDO
JTCLK
JTMS
JTDI
JTRST
HDLC
FEAC
TXP
TXN
LLB
DLB
DS3 / E3
Transmit
Formatter
DS3 / E3
Receive
Framer
Trail
Trace
Buffer
ROH
ROHCLK
ROHSOF
TOH
TOHCLK
TOHSOF
RSER
RCLKO/RGCLK
RSOFO/RDEN
DS3/E3
Receive
LIU
TAIS
TUA1
TOHEN
Clock Rate
Adapter
REFCLK
MODE
INT
GPIO[8:1]
WIDTH
RDY
TCLKO/TGCLK
PLB
ALB
UA1
GEN
RPOS/RDAT
RNEG/RCLV
RST
B3ZS/
HDB3
Encoder
B3ZS/
HDB3
Decoder
Serial Interface Mode:
SPI (SCLK, MOSI, and MISO)
A[0]/BSWAP
SPI
TCLKI
TSER
TSOFI
TX
BERT
RX
BERT
DS3170