Manual

DS3170 DS3/E3 Single-Chip Transceiver
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6.4 DS3/E3 Unframed POS/NEG Mode
The frame mode determines the CLAD clock rate if used as the transmit clock and selects B3ZS or HDB3.
FRAME MODE FM[2:0]
DS3 Unframed 100
E3 Unframed 110
LIU MODE LM[2:0] TZSD & RZSD
TLEN
PORT.CR2
LIU Off, B3ZS or HDB3 000 0 1
LIU Off, AMI 000 1 1
Figure 6-4. DS3/E3 Unframed POS/NEG Mode
TDEN
RLCLK
TPOS
TNEG
TLCLK
IEEE P1149.1
JTAG Test
Access Port
D[15:0]
A[8:1]
ALE
CS
RD/DS
WR/R/W
Serial or Parallel
uP Inteface
JTDO
JTCLK
JTMS
JTDI
JTRST
LLB
DLB
RSER
RCLKO
RDEN
TAIS
TUA1
Clock Rate
Adapter
REFCLK
MODE
INT
GPIO[8:1]
WIDTH
RDY
TCLKO
PLB
UA1
GEN
RPOS
RNEG
RST
B3ZS/
HDB3
Encoder
B3ZS/
HDB3
Decoder
Serial Interface Mode:
SPI
A[0]/BSWAP
SPI
TCLKI
TSER
TX
BERT
RX
BERT
ALB
(SCLK, MOSI, and MISO)