Owner's manual

DS3131
162 of 174
AC CHARACTERISTICS: LAYER 1 PORTS
(V
DD
= 3.0V to 3.6V, T
A
= 0°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RC/TC Clock Period t1 (Note 9) 19 ns
RC/TC Clock Low Time t2 8 ns
RC/TC Clock High Time t3 8 ns
RD Setup Time to the Falling Edge or
Rising Edge of RC
t4 5 ns
RD Hold Time from the Falling Edge or
Rising Edge of RC
t5 1 ns
Delay from the Rising Edge or Falling
Edge of TC to Data Valid on TD
t6 (Note 10) 10 15 ns
Note 9: Aggregate, maximum bandwidth and port speed for the DS3131 are directly proportional to PCLK frequency. With a PCLK of 40ns, for
example, the minimum layer one port clock period (t1) is derated to 20ns.
Note 10: In BERT mode, t6 (max) is 17ns.
Figure 13-1. Layer 1 Port AC Timing Diagram
RC[n]/TC[n]
Normal Mode
RD[n]/TC[n]
TD[n]
t4 t5
t6
t1
t2 t3
RC[n]/TC[n]
Inverted Mode