Owner's manual

DS3131
136 of 174
Register Name: PRCC1
Register Description: PCI Revision ID/Class Code Register 1
Register Address: 0x108h
LSB
Revision ID (Read Only/Set to 00h)
Class Code (Read Only/Set to 00h)
Class Code (Read Only/Set to 80h)
MSB
Class Code (Read Only/Set to 06h)
Bits 0 to 7/Revision ID. These read-only bits identify the specific device revision, selected by Dallas
Semiconductor.
Bits 8 to 15/Class Code Interface. These read-only bits identify the subclass interface value for the device and
are fixed at 00h. See Appendix D of PCI Local Bus Specification Revision 2.1 for details.
Bits 16 to 23/Class Code Subclass. These read-only bits identify the subclass value for the device and are fixed at
80h, indicating “Other Bridge Device.” See Appendix D of PCI Local Bus Specification Revision 2.1 for details.
Bits 24 to 31/Class Code Base Class. These read-only bits identify the base class value for the device and are
fixed at 06h, which indicate “Bridge Devices.” See Appendix D of PCI Local Bus Specification Revision 2.1 for
details.
Register Name: PLTH1
Register Description: PCI Latency Timer/Header Type Register 1
Register Address: 0x10Ch
LSB
Cache Line Size (Read Only/Set to 00h)
Latency Timer (Read Only/Set to 00h)
Header Type (Read Only/Set to 80h)
MSB
BIST (Read Only/Set to 00h)
Bits 0 to 7/Cache Line Size. These read-only bits are forced to 0.
Bits 8 to 15/Latency Timer. These read-only bits are forced to 0 by the device since the device cannot act as a
bus master.
Bits 16 to 23/Header Type. These read-only bits are forced to 80h, which indicate a multifunction device.
Bits 24 to 31/Built-In Self-Test (BIST). These read-only bits are forced to 0.