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DS3131

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Figure 9-12. Transmit DMA Packet Handling

Buffer 1

Packet 1

1st Descripto

r

(EOF=0/CV=0)

Buffer 2

Packet 1

2nd Descripto

r

(EOF=0/CV=0)

Buffer 3

Packet 1

Last Descripto

r

(EOF=1/CV=1)

Buffer 1

Packet 2

Last Descripto

r

(EOF=1/CV=0)

Buffer 1

Packet 3

1st Descripto

r

(EOF=0/CV=0)

Buffer 2

Packet 3

2nd Descripto

r

(EOF=0/CV=0)

Buffer 3

Packet 3

Last Descripto

r

(EOF=1/CV=1)

Buffer 1

Packet 4

Last Descripto

r

(EOF=1/CV=0)

Buffer 1

Packet 5

Last Descripto

r

(EOF=1/CV=0)

Buffer 1

Packet 6

1st Descripto

r

(EOF=0/CV=0)

Buffer 2

Packet 6

2nd Descripto

r

(EOF=0/CV=0)

Buffer 3

Packet 6

Last Descripto

r

(EOF=1/CV=0)

PV=1 PV=1

Next Pending

Descriptor Pointe

r

stored within the

Packet Descripto

r

Last Pending Descriptor Pointe

r

Next Pending Descriptor Pointe

r

Next Descriptor Pointe

r

Start Descriptor Pointe

r

Next Pending

Descriptor Pointe

r

stored within the

Packet Descripto

r

Transmit DMA Configuration RAM

Packet Chain

Column 1

Packet Chain

Column 2

Packet Chain

Column 3

Packet Chain

Column 4