User Manual

DS28DG02: 2kb SPI EEPROM with PIO, RTC, Reset, Battery Monitor, and Watchdog
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Figure 2. Memory Map
ADDRESS TYPE ACCESS DESCRIPTION
000h to 03Fh EEPROM R/W User memory block 0.
040h to 07Fh EEPROM R/W User memory block 1.
080h to 0BFh EEPROM R/W User memory block 2.
0C0h to 0FFh EEPROM R/W User memory block 3.
100h to 109h — — Reserved, contents undefined.
10Ah EEPROM R/W Power-on default for PIO output state (PIO0 to PIO7).
10Bh EEPROM R/W Power-on default for PIO output state (PIO8 to PIO11).
10Ch EEPROM R/W Power-on default for PIO direction (PIO0 to PIO7).
10Dh EEPROM R/W Power-on default for PIO direction (PIO8 to PIO11).
10Eh EEPROM R/W Power-on default for PIO read-inversion (PIO0 to PIO7).
10Fh EEPROM R/W
Power-on default for PIO read-inversion (PIO8 to PIO11),
PIO output type (PIO0 to PIO11 in groups of 4 PIOs), PIO
output mode (same mode for all PIOs).
110h to 117h — — Reserved, contents is undefined.
118h to 11Fh ROM R 64-bit unique registration number.
120h SRAM R/W PIO output state (PIO0 to PIO7).
121h SRAM R/W PIO output state (PIO8 to PIO11).
122h SRAM R/W PIO direction (PIO0 to PIO7).
123h SRAM R/W PIO direction (PIO8 to PIO11).
124h SRAM R/W PIO read-inversion (PIO0 to PIO7).
125h SRAM R/W
PIO read-inversion (PIO8 to PIO11), PIO output type (PIO0
to PIO11 in groups of 4 PIOs), PIO output mode (same
mode for all PIOs).
126h — R PIO read access (PIO0 to PIO7).
127h — R PIO read access (PIO8 to PIO11).
128h — — Reserved, contents undefined.
129h to 12Fh NV SRAM R/W RTC and calendar.
130h to 133h NV SRAM R/W RTC alarm.
134h NV SRAM R/W Multifunction control/setup register.
135h NV SRAM R/Clear Alarm and status register.
136h and above — — Reserved, contents undefined.