User Manual

DS2172
031197 9/20
7.0 ERROR INSERT REGISTER
The Error Insertion Register (EIR) controls circuitry
within the DS2172 that allows the generated pattern to
be intentionally corrupted. Bit errors can be inserted
automatically at regular intervals by properly program-
ming the EIR0 to EIR2 bits or bit errors can be inserted at
random (under microcontroller control) via the EIR.3 bit.
EIR: ERROR INSERT REGISTER (Address=07 Hex)
(MSB) (LSB)
–
– TINV RINV SBE EIR2 EIR1 EIR0
SYMBOL POSITION NAME AND DESCRIPTION
– EIR.7 Not Assigned. Should be set to 0 when written to.
– EIR.6 Not Assigned. Should be set to 0 when written to.
TINV EIR.5 Transmit Data Inversion Select.
0 = do not invert data to be transmitted at TDATA
1 = invert data to be transmitted at TDATA
RINV EIR.4 Receive Data Inversion Select.
0 = do not invert data received at RDATA
1 = invert data received at RDATA
SBE EIR.3 Single Bit Error Insert. A low to high transition will create a single bit error.
Must be cleared and set again for a subsequent bit error to be inserted. Can
be used to accomplish rates not addressed in Table 3 (e.g., BER of less
than 10
–7
).
EIB2 EIR.2 Error Insert Bit 2. See Table 3.
EIB1 EIR.1 Error Insert Bit 1. See Table 3.
EIB0 EIR.0 Error Insert Bit 0. See Table 3.
ERROR BIT INSERTION Table 3
EIB2 EIB1 EIB0 ERROR RATE INSERTED
0 0 0 no errors automatically inserted
0 0 1 10
–1
0 1 0 10
–2
0 1 1 10
–3
1 0 0 10
–4
1 0 1 10
–5
1 1 0 10
–6
1 1 1 10
–7