User Manual

DS2153Q
022697 44/48
AC CHARACTERISTICS – RECEIVE SIDE (0°C to 70°C; V
DD
=5V ± 5%)
(–40°C to +85°C; V
DD
=5V +5%/–4% for DS2153QN)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
ALCKI/RCLK Period t
CP
488 ns
RCLK Pulse Width t
CH
t
CL
180
180
244
244
ns
ns
1
RCLK Pulse Width t
CH
t
CL
90
200
244
244
ns
ns
2
SYSCLK Period t
SP
t
SP
648
488
ns
ns
3
4
SYSCLK Pulse Width t
SH
t
SL
50
50
ns
RSYNC Set Up to SYSCLK Fal-
ling
t
SU
25 t
SH
–5 ns
RSYNC Pulse Width t
PW
50 ns
SYSCLK Rise/Fall Times t
R
, t
F
25 ns
Delay RCLK or SYSCLK to RSER
Valid
t
DD
70 ns
Delay RCLK or SYSCLK to
RCHCLK
t
D1
50 ns
Delay RCLK or SYSCLK to
RCHBLK
t
D2
50 ns
Delay RCLK or SYSCLK to
RSYNC
t
D3
50 ns
Delay RCLK to RLCLK t
D4
50 ns
Delay RCLK to RLINK Valid t
D5
50 ns
NOTES:
1. Jitter attenuator enabled in the receive side path.
2. Jitter attenuator disabled or enabled in the transmit path.
3. SYSCLK=1.544 MHz.
4. SYSCLK=2.048 MHz.