Owner's manual

DS2152
031897 64/79
TRANSMIT SIDE BOUNDARY TIMING Figure 15–8
CHANNEL 2CHANNEL 1
LSB
TCLK
TSER
TSYNC
1
TSYNC
2
TSIG
TCHCLK
T
CHBLK
3
TLCLK
TLINK
4
DON’T CARE
A
MSB LSB MSB LSB MSB
CHANNEL 2CHANNEL 1
B C/A D/B A B C/A D/B
F
NOTES:
1. TSYNC is in the output mode (TCR2.2=1).
2. TSYNC is in the input mode (TCR2.2=0).
3. TCHBLK is programmed to block channel 2.
4. Shown is TLINK/TLCLK in the ESF framing mode.
TRANSMIT SIDE 1.544 MHz BOUNDARY TIMING(WITH ELASTIC STORE ENABLED) Figure 15–9
CHANNEL 23
LSB MSB
TSYSCLK
TSER
1
TSSYNC
TSIG
TCHCLK
TCHBLK
1
CHANNEL 24 CHANNEL 1
LSB
F
CHANNEL 23 CHANNEL 24 CHANNEL 1
A B C/A D/B A B C/A D/B A
NOTES:
1. TCHBLK is programmed to block channel 24 (if the TPCSI bit is set, then the signaling data at TSIG will be ignored
during channel 24).