Owner's manual

DS21455/DS21458 Quad T1/E1/J1 Transceivers
3 of 270
TABLE OF CONTENTS
1. DESCRIPTION ................................................................................................................................................9
1.1 S
TANDARDS ...................................................................................................................... 10
2. FEATURE HIGHLIGHTS...............................................................................................................................11
2.1 G
ENERAL .......................................................................................................................... 11
2.2 L
INE INTERFACE ................................................................................................................ 11
2.3 C
LOCK SYNTHESIZER ........................................................................................................ 11
2.4 J
ITTER ATTENUATOR ......................................................................................................... 12
2.5 F
RAMER/FORMATTER ........................................................................................................ 12
2.6 S
YSTEM INTERFACE........................................................................................................... 13
2.7 HDLC C
ONTROLLERS ....................................................................................................... 13
2.8 T
EST AND DIAGNOSTICS .................................................................................................... 13
2.9 E
XTENDED SYSTEM INFORMATION BUS .............................................................................. 14
2.10 C
ONTROL PORT ................................................................................................................ 14
3. BLOCK DIAGRAM ........................................................................................................................................15
4. DS21455/DS21458 DELTA ...........................................................................................................................17
4.1 P
ACKAGE .......................................................................................................................... 17
4.2 C
ONTROLLER INTERFACE................................................................................................... 17
4.3 ESIB F
UNCTION................................................................................................................ 17
4.4 F
RAMER/LIU INTERIM SIGNALS .......................................................................................... 17
5. PIN FUNCTION DESCRIPTION....................................................................................................................20
5.1 T
RANSMIT SIDE PINS ......................................................................................................... 20
5.2 R
ECEIVE SIDE PINS ........................................................................................................... 22
5.3 P
ARALLEL CONTROL PORT PINS ........................................................................................ 24
5.4 E
XTENDED SYSTEM INFORMATION BUS .............................................................................. 26
5.5 JTAG T
EST ACCESS PORT PINS........................................................................................ 26
5.6 L
INE INTERFACE PINS ........................................................................................................ 27
5.7 S
UPPLY PINS .................................................................................................................... 28
5.8 P
IN DESCRIPTIONS ............................................................................................................ 29
5.9 P
ACKAGES ........................................................................................................................ 39
6. PARALLEL PORT .........................................................................................................................................41
6.1 R
EGISTER MAP ................................................................................................................. 41
7. SPECIAL PER-CHANNEL REGISTER OPERATION ..................................................................................46
8. PROGRAMMING MODEL.............................................................................................................................48
8.1 P
OWER-UP SEQUENCE...................................................................................................... 49
8.1.1 Master Mode Register........................................................................................................49
8.2 I
NTERRUPT HANDLING ....................................................................................................... 50
8.3 S
TATUS REGISTERS .......................................................................................................... 50
8.4 I
NFORMATION REGISTERS.................................................................................................. 51
8.5 I
NTERRUPT INFORMATION REGISTERS ................................................................................ 51
9. CLOCK MAP .................................................................................................................................................52
10. T1 FRAMER/FORMATTER CONTROL REGISTERS .................................................................................53
10.1 T1 C
ONTROL REGISTERS .................................................................................................. 53
10.2 T1 T
RANSMIT TRANSPARENCY........................................................................................... 58
10.3 AIS-CI
AND RAI-CI GENERATION AND DETECTION ............................................................. 59
10.4 T1 R
ECEIVE-SIDE DIGITAL-MILLIWATT CODE GENERATION ................................................. 60
10.5 T1 I
NFORMATION REGISTER............................................................................................... 62
11. E1 FRAMER/FORMATTER CONTROL REGISTERS .................................................................................64
11.1 E1 C
ONTROL REGISTERS .................................................................................................. 64
11.2 A
UTOMATIC ALARM GENERATION ....................................................................................... 68
11.2.1 Auto AIS ...........................................................................................................................68
11.2.2 Auto RAI ...........................................................................................................................68
11.2.3 Auto E-Bit .........................................................................................................................68
11.2.4 G.706 CRC-4 Interworking ............................................................................................68
11.3 E1 I
NFORMATION REGISTERS ............................................................................................ 69
12. COMMON CONTROL AND STATUS REGISTERS.....................................................................................71