Owner's manual

DS21455/DS21458 Quad T1/E1/J1 Transceivers

240 of 270

Figure 36-13. Receive Side Boundary Timing, RSYSCLK = 1.544MHz

(With Elastic Store Enabled)

NOTES:

1) Data from the E1 channels 1, 5, 9, 13, 17, 21, 25, and 29 is dropped (channel 2 from the E1 link is

mapped to channel 1 of the T1 link, etc.) and the F-bit position is added (forced to one).

2) RSYNC in the output mode (IOCR1.4 = 0).

3) RSYNC in the input mode (IOCR1.4 = 1).

4) RCHBLK is programmed to block channel 24.

RSER

CHANNEL 23/31

CHANNEL 24/32 CHANNEL 1/2

RCHCLK

RCHBLK

RSYSCLK

RSYNC

RMSYNC

LSB FMSB

MSB

LSB