Owner's manual

DS21455/DS21458 Quad T1/E1/J1 Transceivers

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Figure 36-12. Receive Side Boundary Timing (With Elastic Store Disabled)

NOTES:

1) RCHBLK is programmed to block channel 1.

2) RLCLK is programmed to mark the Sa4 bit in RLINK.

3) Shown is a RNAF frame boundary.

4) RSIG normally contains the CAS multiframe-alignment nibble (0000) in channel 1.

CHANNEL 32

CHANNEL 1 CHANNEL 2

CHANNEL 32

CHANNEL 1 CHANNEL 2

RCLK

RSER

RSYNC

RFSYNC

RSIG

RCHCLK

RCHBLK

RLCLK

RLINK

CD A

LSB

MSB

Si 1 A Sa4 Sa5 Sa6 Sa7 Sa8

Sa4 Sa5 Sa6 Sa7 Sa8

Note 4