Manual

DS2143/DS2143Q

031397 27/40

G.802 TIMING

TIMESLOT# 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3 4

RSYNC/

TSYNC

RCHCLK/

TCHCLK

RCHBLK/

TCHBLK

LSB MSB

TIMESLOT 25 TIMESLOT 26

RCLK/TCLK

RSER/TSER

RCHCLK/TCHCLK

RCHBLK/TCHCLK

DETAIL

NOTE:

1. RCHBLK/TCHBLK is programmed to pulse high during timeslots 1 to 15, 17 to 25, during bit 1 of timeslot 26.