Manual

DS2141A
021997 9/35
TSDW TCR2.4 TSYNC Double–Wide.
0=do not pulse double–wide in signaling frames.
1=do pulse double–wide in signaling frames.
(note: this bit must be set to 0 when TCR2.3 = 1 or when TCR2.2 = 0).
TSM TCR2.3 TSYNC Mode Select.
0=frame mode (see the timing in Section 13).
1=multiframe mode (see the timing in Section 13).
TSIO TCR2.2 TSYNC I/O Select.
0=TSYNC is an input.
1=TSYNC is an output.
TD4YM TCR2.1 Transmit Side D4 Yellow Alarm Select.
0=0s in bit 2 of all channels.
1=a 1 in the S–bit position of frame 12.
B7ZS TCR2.0 Bit 7 Zero Suppression Enable.
0=no stuffing occurs.
1=Bit 7 forced to a 1 in channels with all 0s.
CCR1: COMMON CONTROL REGISTER 1 (37h)
(MSB) (LSB)
TESE P34F RSAO – SCLKM RESE PLB LLB
SYMBOL POSITION NAME AND DESCRIPTION
TESE CCR1.7 Transmit Elastic Store Enable.
0=elastic store is bypassed.
1=elastic store is enabled.
P34F CCR1.6 Function of Pin 34.
0=Receive Loss of Sync (RLOS).
1=Loss of Transmit Clock (LOTC).
RSAO CCR1.5 Receive Signaling All 1’s.
0=allow robbed signaling bits to appear at RSER.
1=force all robbed signaling bits at RSER to 1.
– CCR1.4 Not Assigned. Should be set to 0 when written to.
SCLKM CCR1.3 SYSCLK Mode Select.
0=if SYSCLK is 1.544 MHz.
1=if SYSCLK is 2.048 MHz.
RESE CCR1.2 Receive Elastic Store Enable.
0=elastic store is bypassed.
1=elastic store is enabled.
PLB CCR1.1 Payload Loopback.
0=loopback disabled.
1=loopback enabled.
LLB CCR1.0 Local Loopback.
0=loopback disabled.
1=loopback enabled.