Manual

DS2141A
021997 8/35
TCR1: TRANSMIT CONTROL REGISTER 1 (35h)
(MSB) (LSB)
ODF TFPT TCPT RBSE GB7S TLINK TBL TYEL
SYMBOL POSITION NAME AND DESCRIPTION
ODF TCR1.7 Output Data Format.
0=bipolar data at TPOS and TNEG.
1=NRZ data at TPOS; TNEG = 0.
TFPT TCR1.6 Transmit Framing Pass Through.
0=Ft or FPS bits sourced internally.
1=Ft or FPS bits sampled at TSER during F–bit time.
TCPT TCR1.5 Transmit CRC Pass Through.
0=source CRC6 bits internally.
1=CRC6 bits sampled at TSER during F–bit time.
RBSE TCR1.4 Robbed Bit Signaling Enable.
0=no signaling is inserted in any channel.
1=signaling is inserted in all channels (the TTR registers can be used to
block insertion on a channel by channel basis).
GB7S TCR1.3 Global Bit 7 Stuffing.
0=allow the TTR registers to determine which channels containing all zeros
are to be bit 7 stuffed.
1=force bit 7 stuffing in all zero byte channels regardless of how the TTR
registers are programmed.
TLINK TCR1.2 TLINK Select.
0=source FDL or Fs bits from TFDL register.
1=source FDL or Fs bits from the TLINK pin.
TBL TCR1.1 Transmit Blue Alarm.
0=transmit data normally.
1=transmit an unframed all 1’s code at TPOS and TNEG.
TYEL TCR1.0 Transmit Yellow Alarm.
0=do not transmit yellow alarm.
1=transmit yellow alarm.
TCR2: TRANSMIT CONTROL REGISTER 2 (36h)
(MSB) (LSB)
TESTM
TESTIO TZBTSI TSDW TSM TSIO TD4YM B7ZS
SYMBOL POSITION NAME AND DESCRIPTION
TESTM TCR2.7 Test Mode Select. Set this bit to a 1 to force all outputs (including I/O pins)
either high (TCR2.6 = 1) or low (TCR2.6 = 0).
TESTIO TCR2.6 Test I/O Pins.
0=force all output (and I/O) pins to a logic 0.
1=force all output (and I/O) pins to a logic 1.
TZBTSI TCR2.5 Transmit Side ZBTSI Enable.
0=ZBTSI disabled.
1=ZBTSI enabled.