
DS2141A
021997 32/35
RECEIVE SIDE AC TIMING
SYSCLK
RCLK
RSER
RPOS,
RNEG
RCHCLK
RCHBLK
RSYNC
1
RSYNC
2
RLCLK
RLINK
t
R
t
DD
t
F
t
CL
t
CH
t
P
t
HD
t
SU
t
DD
t
SU
t
PW
t
DD
t
DD
t
DD
t
DD
F–BIT
NOTES:
1. RSYNC is in the output mode (RCR2.3=0).
2. RSYNC is in the input mode (RCR2.3=1).