Manual

DS2141A
021997 18/35
TFDL: TRANSMIT FDL REGISTER (7Eh)
(MSB) (LSB)
TFDL7 TFDL6 TFDL5 TFDL4 TFDL3 TFDL2 TFDL1 TFDL0
SYMBOL POSITION NAME AND DESCRIPTION
TFDL7 TFDL.7 MSB of the FDL code to be transmitted.
TFDL0 TFDL.0 LSB of the FDL code to be transmitted.
The Transmit FDL Register (TFDL) contains the Facility
Data Link (FDL) information that is to be inserted on a
byte basis into the outgoing T1 data stream. The LSB is
transmitted first.
7.0 SIGNALING OPERATION
The robbed bit signaling bits in embedded in the T1
stream can be extracted from the receive stream and in-
serted into the transmit stream by the DS2141A. There
is a set of 12 registers for the receive side (RS1 to RS12)
and 12 registers on the transmit side (TS1 to TS12).
The signaling registers are detailed below. The CCR1.5
bit is used to control the robbed signaling bits as they ap-
pear at RSER. If CCR1.5 is set to 0, then the robbed
signaling bits will appear at RSER in their proper posi-
tion as they are received. If CCR1.5 is set to a 1, then
the robbed signaling bit positions will be forced to a 1 at
RSER.
RS1 TO RS12: RECEIVE SIGNALING REGISTERS (60h to 6Bh)
(MSB) (LSB)
A(8) A(7) A(6) A(5) A(4) A(3) A(2) A(1)
A(16) A(15) A(14) A(13) A(12) A(11) A(10) A(9)
A(24) A(23) A(22) A(21) A(20) A(19) A(18) A(17)
B(8) B(7) B(6) B(5) B(4) B(3) B(2) B(1)
B(16) B(15) B(14) B(13) B(12) B(11) B(10) B(9)
B(24) B(23) B(22) B(21) B(20) B(19) B(18) B(17)
C(8) C(7) C(6) C(5) C(4) C(3) C(2) C(1)
C(16) C(15) C(14) C(13) C(12) C(11) C(10) C(9)
C(24) C(23) C(22) C(21) C(20) C(19) C(18) C(17)
D(8) D(7) D(6) D(5) D(4) D(3) D(2) D(1)
D(16) D(15) D(14) D(13) D(12) D(11) D(10) D(9)
D(24) D(23) D(22) D(21) D(20) D(19) D(18) D(17)
SYMBOL POSITION NAME AND DESCRIPTION
D(24) RS12.7 Signaling Bit D in Channel 24.
A(1) RS1.0 Signaling Bit A in Channel 1.
RS1 (60)
RS2 (61)
RS3 (62)
RS4 (63)
RS5 (64)
RS6 (65)
RS7 (66)
RS8 (67)
RS9 (68)
RS10 (69)
RS11 (6A)
RS12 (6B)