Instruction Manual

DS2130Q
041295 14/22
SPECIAL CLOCK REQUIREMENTS
The minimum number of clock transitions at CPXCLK
and PCMCLK is nine per every CPXFS and PCMFS pe-
riod (one for clocking the frame sync pulse and eight for
the PCM or CPX data bits). When using this minimum
number, please note that all nine clocks must occur
within 1/3 of the total PCMFS/CPXFS period. For exam-
ple, if CPXFS=8 KHz, then nine CPXCLK clocks must
be received within 41.7 µs after the rising edge of
CPXFS. The CPXCLK pin can remain idle until the next
CPXFS rising edge.
When the DS2130 is placed in the power-down mode
(CPD1=CPD2=1), the serial port must be subsequently
clocked at less than 39 KHz (at SCLK ) to write new
data. Once the power-down mode is exited, the serial
port can be operated at full speed again.
DTMF/ENERGY DETECTION
The DS2130 provides continuous detection of DTMF
signals as well as monitoring of signal levels received at
PCMIN. The only exception is when CPD1 and CPD2
are both set to one, which disables all DSP activity. The
detect outputs, DT0-DT3 as shown in Table 5, indicate
when DTMF digits have been detected and when cer-
tain energy thresholds have been exceeded. DTMF
digits always take precedence over energy monitoring.
For example, if a voice signal is present, only the states
1100 through 1111 are possible since DTMF signals are
not present. When a DTMF digit is detected, the code
for that digit will appear at DT0-DT3 for the duration of
the signal. When the digit is no longer present,
DT0-DT3 will return to one of the four possible energy
detect states (1100 - 1111). It is recommended that
these outputs be scanned at a rate no slower than 30
mS to avoid missing a digit since a DTMF burst may be
as short as 50 ms. If the digit is generated only by a key-
pad depression, then a slower sample rate can be used.
As shown in Figure 1, the energy detector monitors the
output of the DTMF low-band filter, which is a low-pass
filter with a breakpoint at 1 KHz. The fundamental pow-
er spectrum of speech is typically in the range of 500 -
1000 Hz so that the energy detector can be used as an
indication of voice level strength. This information can
be used to determine if the gain in the analog front-end
needs to be increased or when to stop recording. The
energy detector integrates the signal over a 10 mS peri-
od.
As shown in Figure 9, a Data Valid signal for interrupting
a processor can be created by simply ANDing the DT2
and DT3 outputs together. The output of the AND gate
will go low whenever a DTMF digit is detected.
DETECT OUTPUT CODING
1
Table 4
DT3-DT0 DESCRIPTION
0000 DTMF digit ‘‘0” detected.
0001 DTMF digit ‘‘1” detected.
0010 DTMF digit ‘‘2” detected.
0011 DTMF digit ‘‘3” detected.
0100 DTMF digit ‘‘4” detected.
0101 DTMF digit ‘‘5” detected.
0110 DTMF digit ‘‘6” detected.
0111 DTMF digit ‘‘7” detected.
1000 DTMF digit ‘‘8” detected.
1001 DTMF digit ‘‘9” detected.
1010 DTMF digit ‘‘*” detected.
1011 DTMF digit ‘‘#” detected.
1100 Vin > -15 dBm0
1101 -15 > Vin > -25 dBm0
1110 -25 > Vin > -40 dBm0
1111 -40 > Vin
1. Zero dBm0 is defined as the PCM signal level, which is 3 dB below the maximum PCM level.