User guide

DS1875
PON Triplexer and SFP Controller
80 ______________________________________________________________________________________
Table 02h, Register C0h: DPU
FACTORY DEFAULT 00h
READ ACCESS PW2
WRITE ACCESS PW2
MEMORY TYPE Nonvolatile (SEE)
C0h INV M3QT MUX M3QT INV LOS MUX LOS D3 CNTL D2 CNTL D1 CNTL D0 CNTL
BIT 7 BIT 0
BIT 7
INV M3QT: Inverts the internal M3QT signal to output pin D2 if MUX M3QT is set. If MUX M3QT is
not set, this bit’s value is a don’t care.
0 = (Default) Noninverted M3QT to D2 pin.
1 = Inverted M3QT to D2 pin.
BIT 6
MUX M3QT: Chooses the control for D2 output pin.
0 = (Default) D2 is controlled by bit D2 IN found in byte 79h.
1 = M3QT is buffered to D2 pin.
BIT 5
INV LOS: Inverts the buffered input pin LOSI to output pin D0 if MUX LOS is set. If MUX LOS is
not set, this bit’s value is a don’t care.
0 = (Default) Noninverted LOSI to D0 pin.
1 = Inverted LOSI to D0 pin.
BIT 4
MUX LOS: Chooses the control for D0 output pin.
0 = (Default) DO is controlled by bit D0 IN found in byte 79h.
1 = LOSI is buffered to D0 pin.
BIT 3
D3 CNTL: At power-on, this bit’s value is loaded into bit D3 OUT of byte 78h to control the output
pin D3.
0 = (Default)
BIT 2
D2 CNTL: At power-on, this bit’s value is loaded into bit D2 OUT of byte 78h to control the output
pin D2.
0 = (Default)
BIT 1
D1 CNTL: At power-on, this bit’s value is loaded into bit D1 OUT of byte 78h to control the output
pin D1.
0 = (Default)
BIT 0
D0 CNTL: At power-on, this bit’s value is loaded into bit D0 OUT of byte 78h to control the output
pin D0.
0 = (Default)
Controls the power-on values for D3, D2, D1, and D0 output pins and mux and invertion of the LOSI pin.