User guide

DS1875
Table 02h, Register 88h: SAMPLE RATE
FACTORY DEFAULT 30h
READ ACCESS PW2
WRITE ACCESS PW2
MEMORY TYPE Nonvolatile (SEE)
88h SEE SEE PWM_FR
1
PWM_FR
0
APC_SR
3
APC_SR
2
APC_SR
1
APC_SR
0
BIT 7 BIT 0
BITS 7:6 SEE
BITS 5:4
PWM_FR[1:0]: 2-bit frequency rate for the SW pulsed output used with PWM. When switching a
lower to a higher frequency, disable the SW output by setting SOFT M3QT (Byte 78h) to a 1 before
changing PWM_FR. After changing PWM_FR, wait 200 periods of the new frequency before
enabling the SW output. This delay allows for the internal signals to integrate and lock to the new
frequency without creating a large duty cycle.
00b: 131.25kHz
01b: 262.5kHz
10b: 525kHz
11b: 1050kHz (Default)
BITS 3:0 APC_SR[3:0]: 4-bit sample rate for comparison of APC control.
APC_SR[3:0]
MINIMUM TIME FROM
BEN TO FIRST SAMPLE
(t
FIRST
) ±50ns
(ns)
REPEATED SAMPLE
PERIOD FOLLOWING
FIRST SAMPLE (t
REP
)
(ns)
0000b 350 800
0001b 550 1200
0010b 750 1600
0011b 950 2000
0100b 1350 2800
0101b 1550 3200
0110b 1750 3600
0111b 2150 4400
1000b 2950 6000
1001b* 3150 6400
Defines the sample rate for comparison of APC control.
* All codes greater than 1001b (1010b to 1111b) use the maximum sample time of
code 1001b.
PON Triplexer and SFP Controller
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