Manual

DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
____________________________________________________________________ 13
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION
FUNCTION
20 to 21 EEPROM
R/W
00
MON3limhi (MSB to LSB)
Contains upper limit settings for MON3. If the
limit is violated, a flag in Main Device byte 71h
is set.
22 to 23 EEPROM
R/W
00
MON3limhi (MSB to LSB)
Contains lower limit settings for MON3. If the
limit is violated, a flag in Main Device byte 71h
is set.
24 to 5F EEPROM — 00 Reserved —
60 to 61 SRAM R —
Measured TMP
(MSB to LSB)
Digitized measured value for temperature.
See Table 1.
62 to 63 SRAM R —
Measured V
CC
(MSB to LSB)
Digitized measured value for V
CC
.
See Table 1.
64 to 65 SRAM R —
Measured MON1
(MSB to LSB)
Digitized measured value for MON1.
See Table 1.
66 to 67 SRAM R —
Measured MON2
(MSB to LSB)
Digitized measured value for MON2.
See Table 1.
68 to 69 SRAM R —
Measured MON3
(MSB to LSB)
Digitized measured value for MON3.
See Table 1.
6A to 6D SRAM R — Reserved —
6E SRAM — — Logic states —
Bit 7 — R X HIZSTA
Resistor status bit. A high indicates that both
resistors are in high-impedance mode. A low
indicates that both resistors are operating
normally.
6—
R/W
0 HIZCO
Resistor control bit. Setting this bit high
causes both resistors to go into a high-
impedance state.
5——X X —
4——X X —
2—RX TXF
This status bit is high when OUT1 is high
assuming there is an external pullup resistor
on OUT1.
3——X X —
1—RX RXL
This status bit is high when OUT2 is high
assuming there is an external pullup resistor
on OUT2.
0—RX RDYB
This status bit goes high when V
CC
has fallen
below the POA level.
Main Device (continued)