Manual
DS1857
Dual Temperature-Controlled Resistors with
External Temperature Input and Monitors
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MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF
LOCATION
FUNCTION
5——0 ADEN
Controls if the device responds to one or two device
addresses (see the Memory Description section and
Table 5).
4——0 ADFIX
Controls the means by which Main and Auxiliary Device
addresses are set (see the Memory Description section
and Table 5).
3——0 APEN
C ontr ol s auxi l i ar y w r i te p r otect. S ee the M em or y D escr i p ti on
2——0 MPEN
C ontr ol s auxi l i ar y w r i te p r otect. S ee the M em or y D escr i p ti on
1——0 X —
0——0 X —
8A to 8B
EEPROM
—00 Reserved —
8C
EEPROM
R/W A2
Device address
Contains Main Device address if the bit ADFIX = 1. If
ADFIX = 0, then address pins determine the address.
8D to 8F
EEPROM
—— Reserved —
Table 01h (continued)
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION FUNCTION
80 to C7
EEPROM
R/W FF Resistor 0 Temp LUT Look-up table for Resistor 0.
F0 to FF
EEPROM
RFF Reserved —
Table 02h
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION FUNCTION
80 to C7
EEPROM
R/W FF Resistor 1 Temp LUT Look-up table for Resistor 1.
F0 to FF
EEPROM
RFF Reserved —
Table 03h