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DS1245Y/AB

1024K Nonvolatile SRAM

DS1245Y/AB

041497 1/12

FEATURES

• 10 years minimum data retention in the absence of

external power

• Data is automatically protected during power loss

• Replaces 128K x 8 volatile static RAM, EEPROM or

Flash memory

• Unlimited write cycles

• Low–power CMOS

• Read and write access times as fast as 70 ns

• Lithium energy source is electrically disconnected to

retain freshness until power is applied for the first time

• Full ±10% V

operating range (DS1245Y)

• Optional ±5% V

operating range (DS1245AB)

• Optional industrial temperature range of –40°C to

+85°C, designated IND

• JEDEC standard 32–pin DIP package

• New PowerCap Module (PCM) package

– Directly surface–mountable module

– Replaceable snap–on PowerCap provides lith-

ium backup battery

– Standardized pinout for all nonvolatile SRAM

products

– Detachment feature on PowerCap allows easy

removal using a regular screwdriver

PIN ASSIGNMENT

32–PIN ENCAPSULATED PACKAGE

740 MIL EXTENDED

A14

A13

A12

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

A15

A16

GND V

BAT

34–PIN POWERCAP MODULE (PCM)

(USES DS9034PC POWERCAP)

A16

A14

A12

DQ0

DQ1

DQ2

GND

A15

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

PIN DESCRIPTION

A0 – A14 – Address Inputs

DQ0 – DQ7 – Data In/Data Out

– Chip Enable

WE – Write Enable

OE – Output Enable

– Power (+5V)

GND – Ground

NC – No Connect

Summary of content (12 pages)

PAGE 1
DS1245Y/AB DS1245Y/AB 1024K Nonvolatile SRAM FEATURES PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power • Data is automatically protected during power loss • Replaces 128K x 8 volatile static RAM, EEPROM or Flash memory • Unlimited write cycles • Low–power CMOS • Read and write access times as fast as 70 ns • Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time • Full ±10% VCC operating range (DS1245Y) • Opt
PAGE 2
DS1245Y/AB DESCRIPTION The DS1245 1024K Nonvolatile SRAMs are1,048,576– bit, fully static, nonvolatile SRAMs organized as 131,072 words by 8 bits. Each complete NV SRAM has a self–contained lithium energy source and control circuitry which constantly monitors VCC for an out–of–tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption.
PAGE 3
DS1245Y/AB ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature –0.3V to +7.0V 0°C to 70°C, –40°C to +85°C for Ind parts –40°C to +70°C, –40°C to +85°C for Ind parts 260°C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
PAGE 4
DS1245Y/AB (VCC=5V ± 5% for DS1245AB) (tA: See Note 10) (VCC=5V ± 10% for DS1245Y) AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL DS1245AB–70 DS1245Y–70 DS1245AB–85 DS1245Y–85 MIN MIN MAX NOTES Read Cycle Time tRC Access Time tACC 70 85 ns OE to Output Valid tOE 35 45 ns CE to Output Valid tCO 70 85 ns OE or CE to Output Active tCOE Output High Z from Deselection tOD Output Hold from Address Change tOH 5 5 ns Write Cycle Time tWC 70 85 ns Write Pulse Width tWP 55
PAGE 5
DS1245Y/AB (VCC=5V ± 5% for DS1245AB) (tA: See Note 10) (VCC=5V ± 10% for DS1245Y) AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL DS1245Y-100 DS1245AB-100 DS1245Y-120 DS1245AB-120 MIN MIN MAX 100 UNITS NOTES MAX Read Cycle Time tRC 120 Access Time tACC 100 120 ns OE to Output Valid tOE 50 60 ns CE to Output Valid tCO 100 120 ns OE or CE to Output Active tCOE Output High Z from Deselection tOD Output Hold from Address Change tOH 5 5 ns Write Cycle Time tWC 100 120
PAGE 6
DS1245Y/AB READ CYCLE tRC VIH VIL ADDRESSES VIH VIL VIH VIL tOH tACC VIH CE tOD VIH OE VIH tCO VIL tOE VIH VIL tOD tCOE tCOE VOH OUTPUT VOH VOL DATA VALID VOL DOUT SEE NOTE 1 WRITE CYCLE 1 tWC ADDRESSES VIH VIH VIH VIL VIL VIL tAW CE VIL VIL tWP tWR1 WE VIH VIH VIL VIL tOEW tODW HIGH IMPEDANCE DOUT tDS tDH1 VIH DIN VIL SEE NOTES 2, 3, 4, 6, 7, 8, and 12 041497 6/12 VIH DATA IN STABLE VIL
PAGE 7
DS1245Y/AB WRITE CYCLE 2 tWC ADDRESSES VIH VIH VIH VIL VIL VIL tAW tWP tWR2 CE VIH VIH VIL VIL VIL VIH WE VIL VIL tCOE tODW DOUT tDS tDH2 VIH VIH DATA IN STABLE DIN VIL VIL SEE NOTES 2, 3, 4, 6, 7, 8, and 13 POWER–DOWN/POWER–UP CONDITION VCC VTP 3.
PAGE 8
DS1245Y/AB POWER–DOWN/POWER–UP TIMING PARAMETER (tA: See Note 10) SYMBOL MIN UNITS NOTES tPD 0 µs 11 VCC slew from VTP to 0V (CE at VIH) tF 300 µs VCC slew from 0V to VTP (CE at VIH) tR 300 µs CE, WE at VIH after Power–Up tREC 2 CE, WE at VIH before Power–Down TYP MAX 125 ms (tA = 25°C) PARAMETER Expected Data Retention Time SYMBOL MIN tDR 10 TYP MAX UNITS NOTES years 9 WARNING: Under no circumstance are negative undershoots, of any amplitude, allowed when device is in
PAGE 9
DS1245Y/AB DC TEST CONDITIONS AC TEST CONDITIONS Outputs Open Cycle = 200 ns for operating current All voltages are referenced to ground Output Load: 100 pF + 1TTL Gate Input Pulse Levels: 0 – 3.0V Timing Measurement Reference Levels Input: 1.5V Output: 1.
PAGE 10
DS1245Y/AB DS1245Y/AB NONVOLATILE SRAM, 34–PIN POWERCAP MODULE INCHES PKG DIM MIN NOM MAX A 0.920 0.925 0.930 B 0.980 0.985 0.990 C – – 0.080 D 0.052 0.055 0.058 E 0.048 0.050 0.052 F 0.015 0.020 0.025 G 0.020 0.025 0.
PAGE 11
DS1245Y/AB DS1245Y/AB NONVOLATILE SRAM, 34–PIN POWERCAP MODULE WITH POWERCAP INCHES PKG DIM MIN NOM MAX A 0.920 0.925 0.930 B 0.955 0.960 0.965 C 0.240 0.245 0.250 D 0.052 0.055 0.058 E 0.048 0.050 0.052 F 0.015 0.020 0.025 G 0.020 0.025 0.
PAGE 12
DS1245Y/AB RECOMMENDED POWERCAP MODULE LAND PATTERN A INCHES D C PKG DIM MIN NOM MAX A – 1.050 – B – 0.826 – C – 0.050 – D – 0.030 – E – 0.112 – 16 PL B E RECOMMENDED POWERCAP MODULE SOLDER STENCIL A INCHES D C PKG DIM MIN NOM MAX A – 1.050 – B – 0.890 – C – 0.050 – D – 0.030 – E – 0.