Manual

105
ATmega161(L)
1228CAVR08/02
Figure 70. Port D Schematic Diagram (Pin PD7)
WP:
WD:
RL:
RP:
RD:
RE:
SRE:
WRITE PORTD
WRITE DDRD
READ PORTD LATCH
READ PORTD PIN
READ DDRD
READ ENABLE
EXTERNAL SRAM ENABLE