Features • Industry-standard Architecture – Emulates Many 20-pin PALs® – Low-cost Easy-to-use Software Tools • High-speed Electrically-erasable Programmable Logic Devices – 7.
Description The ATF16V8B is a high-performance CMOS (electricallyerasable) programmable logic device (PLD) that utilizes Atmel’s proven electrically-erasable Flash memory technology. Speeds down to 7.5 ns are offered. All speed ranges are specified over the full 5V ± 10% range for industrial temperature ranges, and 5V ± 5% for commercial temperature ranges. Several low-power options allow selection of the best solution for various types of power-limited applications.
ATF16V8B(QL) DC Characteristics Symbol Parameter Condition IIL Input or I/O Low Leakage Current 0 ≤=VIN ≤=VIL(Max) IIH Input or I/O High Leakage Current 3.5 ≤=VIN ≤=VCC Min Typ Max Units -35 -100 µA 10 µA Com. 55 85 mA Ind. 55 95 mA B-15 Com. 50 75 mA B-15 Ind. 50 80 mA B-25 Com. 50 75 mA B-25 Ind. 50 80 mA BQ-10 Com. 35 55 mA BQL-15 Com. 5 10 mA BQL-15 Ind. 5 15 mA BQL-25 Com. 5 10 mA BQL-25 Ind. 5 15 mA Com. 60 90 mA Ind.
AC Waveforms(1) Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V 3.0V, unless otherwise specified. AC Characteristics(1) -10 Symbol Parameter tPD Input or Feedback to Non-Registered Output tCF Clock to Feedback tCO Clock to Output tS Input or Feedback Setup Time tH 8 outputs switching -25 -15 Min Max Min Max Min Max Units 3 10 3 15 3 25 ns ns 1 output switching 6 2 7 8 2 10 2 10 ns 12 ns 7.
ATF16V8B(QL) Input Test Waveforms and Measurement Levels: Output Test Loads: Commercial tR, tF < 5 ns (10% to 90%) Pin Capacitance f = 1 MHz, T = 25°C(1) CIN COUT Note: Typ Max Units Conditions 5 8 pF VIN = 0 V 6 8 pF VOUT = 0 V 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Power-up Reset The registers in the ATF16V8Bs are designed to reset during power-up.
Electronic Signature Word I/O Diagram There are 64 bits of programmable memory that are always available to the user, even if the device is secured. These bits can be used for user-specific data. Programming/Erasing Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware and Software Support for information on software/programming.
ATF16V8B(QL) Macrocell Configuration Software compilers support the three different OMC modes as different device types. Most compilers have the ability to automatically select the device type, generally based on the register usage and output enable (OE) usage. Register usage on the device forces the software to choose the registered mode. All combinatorial outputs with OE controlled by the product term will force the software to choose the complex mode.
Registered Mode Logic Diagram 8 ATF16V8B(QL)
ATF16V8B(QL) ATF16V8B Complex Mode PAL Device Emulation/PAL Replacement. In the complex mode, combinatorial output and I/O functions are possible. Pins 1 and 11 are regular inputs to the array. Pins 13 through 18 have pin feedback paths back to the AND-array, which makes full I/O capability possible. Pins 12 and 19 (outermost macrocells) are outputs only. They do not have input capability. In this mode, each macrocell has seven product terms going to the sum term and one product term enabling the output.
Complex Mode Logic Diagram 10 ATF16V8B(QL)
ATF16V8B(QL) Simple Mode Logic Diagram 11
SUPPLY CURRENT vs. INPUT FREQUENCY SUPPLY CURRENT vs. INPUT FREQUENCY ATF16V8BL/BQL (VCC = 5V, TA = 25C) ATF16V8B/BQ (VCC = 5V, TA = 25C) 75 75 ATF16V8B ATF16V8B I C C 50 m A 25 ATF16V8BQ 0 25 50 75 100 SUPPLY CURRENT vs. SUPPLY VOLTAGE ATF16V8B/BQ (TA = 25C) 65 ATF16V8B 55 ATF16V8BQ 45 35 25 4.50 4.75 5.00 5.25 5.50 SUPPLY VOLTAGE (V) OUTPUT SOURCE CURRENT vs. SUPPLY VOLTAGE (TA = 25C) -10 -12 I O H -14 -16 -18 m A -20 -22 -24 4.5 4.7 4.9 5.1 5.
ATF16V8B(QL) NORMALIZED TCO vs. SUPPLY VOLTAGE(TA=25°C) 1.3 N O 1.15 ATF16V8B/BQ R M 1 ATF16V8BQL T C 0.85 O 0.7 4.50 4.75 5.00 5.25 5.50 SUPPLY VOLTAGE (V) NORMALIZED TPD vs. SUPPLY VOLTAGE (TA=25°C) 1.3 N O R M T P D 1.15 ATF16V8B/BQ 1 ATF16V8BQL 0.85 0.7 4.50 4.75 5.00 5.25 5.
ATF16V8B(QL)
ATF16V8B(QL) 15
ATF16V8B Ordering Information tPD (ns) tS (ns) tCO (ns) 10 7.
ATF16V8B(QL) ATF16V8BQ and ATF16V8BQL Ordering Information tPD (ns) tS (ns) tCO (ns) 10 7.
Packaging Information 20J, 20-lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AA 20P3, 20-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 AD 1.060(26.9) .980(24.9) PIN 1 .280(7.11) .240(6.10) .090(2.29) MAX .900(22.86) REF .210(5.33) MAX .005(.127) MIN SEATING PLANE .015(.381) MIN .150(3.81) .115(2.92) .022(.559) .014(.356) .070(1.78) .045(1.13) .110(2.79) .090(2.29) .325(8.
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