Instruction Manual

23
ATAR862-4
4552B–4BMCU–02/03
Figure 18. Voltage Monitor
Voltage Monitor Control/
Status Register
Primary register address: "F’hex"
VM2: Voltage monitor Mode bit 2
VM1: Voltage monitor Mode bit 1
VM0: Voltage monitor Mode bit 0
VIM Voltage Interrupt Mask bit
VIM = 0, voltage monitor interrupt is enabled
VIM = 1, voltage monitor interrupt is disabled
VMS Voltage Monitor Status bit
VMS = 0, the voltage at the comparator input is below V
Ref
VMS = 1, the voltage at the comparator input is above V
Ref
V
DD
VM2
Voltage monitor
VM1 VM0 VIM
VMS
- - res
OUT
IN
BP41/
VMI
INT7
VMC :
VMST :
Bit 3Bit 2Bit 1Bit 0
VMC: Write VM2 VM1 VM0 VIM Reset value: 1111b
VMST: Read – – reserved VMS Reset value: xx11b
VM2 VM1 VM0 Function
1 1 1 Disable voltage monitor
110
External (VIM-input), internal reference threshold (1.3 V), interrupt
with negative slope
101Not allowed
100
External (VMI-input), internal reference threshold (1.3 V), interrupt
with positive slope
011
Internal (supply voltage), high threshold (3.0 V), interrupt with
negative slope
010
Internal (supply voltage), middle threshold (2.6 V), interrupt with
negative slope
001
Internal (supply voltage), low threshold (2.2 V), interrupt with
negative slope
000Not allowed