User Manual

74
ATAR862-3
4556B–4BMCU–02/03
Figure 73. Multi-chip Link
Figure 74. SSI Output Masking Function
Serial Interface Registers
Serial Interface Control
Register 1 (SIC1)
Auxiliary register address: "9"hex
Note: This bit has to be set to "1" during the MCL mode and the Timer 3 mode 10 or 11
SCL SDA
MCL_SC MCL_SD
U505M
Microcontroller
V
DD
BP40/SC
BP10
BP43/SD
BP13
Multi chip link
V
SS
8-bit shift register
MSB LSB
Shift_CL
SO
Control
SI
Timer 2
Output
SSI-control
SO
Compare 2/1
4-bit counter 2/1
CL2/1
SCL
CM1
OMSK
SC
TOG2
POUT
T1OUT
SYSCL
/2
Bit 3 Bit 2 Bit 1 Bit 0
SIR SCD SCS1 SCS0 Reset value: 1111b
SIR S
erial Interface Reset
SIR = 1, SSI inactive
SIR = 0, SSI active
SCD Serial Clock Direction
SCD = 1, SC line used as output
SCD = 0, SC line used as input
SCS1 Serial Clock source Select bit 1 SCS1 SCS0 Internal Clock for SSI
SCS0 S
erial Clock source Select bit 0 1 1 SYSCL/2
1 0 T1OUT/2
Note: with SCD = "0" the bits SCS1 0 1 POUT/2
and SCS0 are insignificant 0 0 TOG2/2