User Manual

60
ATAR862-3
4556B–4BMCU–02/03
Timer 3 – Mode 10:
Manchester Demodulation/
Pulse-width Demodulation
For Manchester demodulation, the edge detection stage must be programmed to detect
each edge at the input. These edges are evaluated by the demodulator stage. The timer
stage is used to generate the shift clock for the SSI. The compare register 1 match
event defines the correct moment for shifting the state from the input T3I as the decoded
bit into shift register – after that the demodulator waits for the next edge to synchronize
the timer by a reset for the next bit. The compare register 2 can also be used to detect a
time-out error and handle it with an interrupt routine (see also combination mode 8).
Figure 60. Manchester Demodulation
Timer 3 – Mode 11:
Biphase Demodulation
In the Biphase demodulation mode, the timer operates like in Manchester demodulation
mode. The difference is that the bits are decoded via a toggle flip-flop. This flip-flop sam-
ples the edge in the middle of the bitframe and the compare register 1 match event
shifts the toggle flip-flop output into shift register (see also combined mode 9).
Figure 61. Biphase Demodulation
1011100 110
11
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4
BIT 5
BIT 6
Synchronize Manchester demodulation mode
Timer 3
mode
T3EX
SI
SR-DATA
T3I
CM31=SCI
100110
011 1 1
01
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6
Synchronize Biphase demodulation mode
Timer 3
mode
T3EX
Q1=SI
CM31=SCI
SR-DATA
0000
T3I
Reset
Counter 3
101010