User Manual

ATAR862-3

4556B–4BMCU–02/03

Timer 2 Output Mode 4 Biphase Modulator: Timer 2 Modulates the SSI Internal Data Output (SO) to Biphase

Code.

Figure 47. Biphase Modulation

Timer 2 Output Mode 5 Manchester Modulator: Timer 2 Modulates the SSI internal data output (SO) to

Manchester code

Figure 48. Manchester Modulation

Timer 2 Output Mode 7 In this mode the timer overflow defines the period and the compare register defines the

duty cycle. During one period only the first compare match occurrence is used to toggle

the timer output flip-flop, until the overflow all further compare match are ignored. This

avoids the situation that changing the compare register causes the occurrence of sev-

eral compare match during one period. The resolution at the pulse-width modulation

Timer 2 mode 1 is 12-bit and all other Timer 2 modes are 8-bit.

PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)

Figure 49. PWM Modulation

TOG2

T2O

0000

00110101

11 1 1

8-bit SR-Data

Bit 7 Bit 0

Data: 00110101

TOG2

T2O

000

00110101

11 1 1

8-bit SR-Data

Bit 7 Bit 0

Data: 00110101

0 0 50 255 1000 255 0 150 255 0 50 255 0 100

T2R

Input clock

Counter 2/2

OVF2

CM2

INT4

T2O

load the next

compare value

T2CO2=150 load load

T1 T2 T3 T1 T2

TTT T