User Manual

36
ATAR862-3
4556B–4BMCU–02/03
Figure 31. Bi-directional Port 5
Figure 32. Port 5 External Interrupts
Port 5 Data Register (P5DAT) Primary register address: "5"hex
Port 5 Control Register (P5CR)
Byte Write
Auxiliary register address: "5"hex
Master reset
Q
V
DD
BP5y
Mask options
*
*
P5DATy
I/O Bus
D
IN enable
I/O Bus
*
*
Switched
pull-up
Switched
pull-down
*
Static
pull-up
(Data out)
*
*
S
*
V
DD
Static
Pull-down
V
DD
Bidir. Port
Data in
IN_Enable
BP53
P53M2 P53M1 P52M2 P52M1 P51M2 P51M1 P50M2 P50M1
Decoder Decoder Decoder Decoder
Bidir. Port
Data in
IN_Enable
BP52
I/O-bus
Bidir. Port
Data in
IN_Enable
BP51
I/O-bus
Bidir. Port
Data in
IN_Enable
BP50
INT1 INT6
P5CR:
Bit 3Bit 2Bit 1Bit 0
P5DAT3 P5DAT2 P5DAT1 P5DAT0 Reset value: 1111b
Bit 3Bit 2Bit 1Bit 0
First write cycle P51M2 P51M1 P50M2 P50M1 Reset value: 1111b
Bit 7Bit 6Bit 5Bit 4
Second write cycle P53M2 P53M1 P52M2 P52M1 Reset value: 1111b